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authorWolfgang Denk <wd@denx.de>2007-07-06 02:50:34 +0200
committerWolfgang Denk <wd@denx.de>2007-07-06 02:50:34 +0200
commite80955f07de03fef0196353e77534b2300193c1c (patch)
tree2fbe65d20537c38a71bacf505e285595ddd3e01a /cpu/ppc4xx/start.S
parentf1152f8c28db4a22087c21c618a3f7baa48e9a4f (diff)
parentb44896215a09c60fa40cae906f7ed207bbc2c492 (diff)
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Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Diffstat (limited to 'cpu/ppc4xx/start.S')
-rw-r--r--cpu/ppc4xx/start.S8
1 files changed, 8 insertions, 0 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index dfe813c..6086b6c 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1217,15 +1217,23 @@ mck_return:
* NOTE: currently the 440s run with dcache _disabled_ once relocated to DRAM,
* although for some cache-ralated calls stubs have to be provided to satisfy
* symbols resolution.
+ * Icache-related functions are used in POST framework.
*
*/
#ifdef CONFIG_440
.globl dcache_disable
+ .globl icache_disable
+ .globl icache_enable
dcache_disable:
+icache_disable:
+icache_enable:
blr
.globl dcache_status
+ .globl icache_status
dcache_status:
+icache_status:
+ mr r3, 0
blr
#else
flush_dcache: