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author | roy zang <tie-fei.zang@freescale.com> | 2006-11-29 09:45:03 +0800 |
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committer | Zang Tiefei <roy@bus.ap.freescale.net> | 2006-11-29 09:45:03 +0800 |
commit | 6bd87c0aeea441c49d59fd542b84a9be88d08b17 (patch) | |
tree | e450a5f1e69a78a203a1e15167d7fefa43c5ce7e /cpu/ppc4xx/start.S | |
parent | 0a8eb59983047ae3bcc0babf3ee4d10d01abe7da (diff) | |
parent | d2c83f549378fb3fc34cb3c2e62fd772fbf8b68b (diff) | |
download | u-boot-imx-6bd87c0aeea441c49d59fd542b84a9be88d08b17.zip u-boot-imx-6bd87c0aeea441c49d59fd542b84a9be88d08b17.tar.gz u-boot-imx-6bd87c0aeea441c49d59fd542b84a9be88d08b17.tar.bz2 |
Solve the copyright conflicts when merging 'master' into hpc2.
Merge branch 'master' into hpc2
Conflicts:
drivers/cfi_flash.c
Diffstat (limited to 'cpu/ppc4xx/start.S')
-rw-r--r-- | cpu/ppc4xx/start.S | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 3fe13da..8e000d3 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -204,6 +204,18 @@ _start_440: mfspr r1,mcsr mtspr mcsr,r1 #endif + + /*----------------------------------------------------------------*/ + /* CCR0 init */ + /*----------------------------------------------------------------*/ + /* Disable store gathering & broadcast, guarantee inst/data + * cache block touch, force load/store alignment + * (see errata 1.12: 440_33) + */ + lis r1,0x0030 /* store gathering & broadcast disable */ + ori r1,r1,0x6000 /* cache touch */ + mtspr ccr0,r1 + /*----------------------------------------------------------------*/ /* Initialize debug */ /*----------------------------------------------------------------*/ @@ -225,17 +237,6 @@ _start_440: mtspr dbsr,r1 /* Clear all valid bits */ skip_debug_init: - /*----------------------------------------------------------------*/ - /* CCR0 init */ - /*----------------------------------------------------------------*/ - /* Disable store gathering & broadcast, guarantee inst/data - * cache block touch, force load/store alignment - * (see errata 1.12: 440_33) - */ - lis r1,0x0030 /* store gathering & broadcast disable */ - ori r1,r1,0x6000 /* cache touch */ - mtspr ccr0,r1 - #if defined (CONFIG_440SPE) /*----------------------------------------------------------------+ | Initialize Core Configuration Reg1. |