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authorRicardo Ribalda Delgado <ricardo.ribalda@uam.es>2008-07-17 11:44:12 +0200
committerStefan Roese <sr@denx.de>2008-07-18 12:30:50 +0200
commitd865fd09809a3a18669f35f970781820af40e4de (patch)
tree65506c7eae8f9ebe754f44dcd659a470c211db72 /cpu/ppc4xx/speed.c
parent42246dacf60d5028d3a48a220ce94efcf56faec4 (diff)
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ppc4xx: CPU PPC440x5 on Virtex5 FX
-This patchs gives support for the embbedded ppc440 on the Virtex5 FPGAs -interrupts.c divided in uic.c and interrupts.c -xilinx_irq.c for xilinx interrupt controller -Include modifications propossed by Stefan Roese Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Acked-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/speed.c')
-rw-r--r--cpu/ppc4xx/speed.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c
index b86b6de..d21bd82 100644
--- a/cpu/ppc4xx/speed.c
+++ b/cpu/ppc4xx/speed.c
@@ -416,7 +416,8 @@ ulong get_PCI_freq (void)
return sys_info.freqPCI;
}
-#elif !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE)
+#elif !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && !defined(CONFIG_440SPE) \
+ && !defined(CONFIG_XILINX_440)
void get_sys_info (sys_info_t * sysInfo)
{
unsigned long strp0;
@@ -449,6 +450,8 @@ void get_sys_info (sys_info_t * sysInfo)
sysInfo->freqUART = sysInfo->freqPLB;
}
#else
+
+#if !defined(CONFIG_XILINX_440)
void get_sys_info (sys_info_t * sysInfo)
{
unsigned long strp0;
@@ -535,6 +538,7 @@ void get_sys_info (sys_info_t * sysInfo)
}
#endif
+#endif /* CONFIG_XILINX_440 */
#if defined(CONFIG_YUCCA)
unsigned long determine_sysper(void)