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authorwdenk <wdenk>2003-05-22 22:52:13 +0000
committerwdenk <wdenk>2003-05-22 22:52:13 +0000
commit5d232d0e7ea982d859d028ab482d95eb68460b19 (patch)
treea02c773fa4be5687f8f97d053ebd9afebbfaa54f /cpu/ppc4xx/spd_sdram.c
parentc8c3a8be2dd09e51d7dc33f431e3a638ac5688f2 (diff)
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* Patch by Dave Ellis, 22 May 2003:
Fix problem with only partially cleared .bss segment * Patch by Rune Torgersen, 12 May 2003: get PCI to work on a MPC8266ADS board; incorporate change to cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
Diffstat (limited to 'cpu/ppc4xx/spd_sdram.c')
-rw-r--r--cpu/ppc4xx/spd_sdram.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c
index bf5d224..9c1cac5 100644
--- a/cpu/ppc4xx/spd_sdram.c
+++ b/cpu/ppc4xx/spd_sdram.c
@@ -289,7 +289,7 @@ long int spd_sdram(int(read_spd)(uint addr))
/* now check for ECC ability of module. We only support ECC
* on 32 bit wide devices with 8 bit ECC.
*/
- if ( (read_spd(11)==2) && ((read_spd(6)==40) || (read_spd(14)==8)) ){
+ if ( (read_spd(11)==2) && (read_spd(6)==40) && (read_spd(14)==8) ){
sdram0_ecccfg=0xf<<SDRAM0_ECCCFG_SHIFT;
ecc_on = 1;
}