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| author | <m8@hekate.semihalf.com> | 2005-08-12 15:33:33 +0200 |
|---|---|---|
| committer | <m8@hekate.semihalf.com> | 2005-08-12 15:33:33 +0200 |
| commit | 6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7 (patch) | |
| tree | bac8690410f0c5dba55f940d0bb403029459cdae /cpu/ppc4xx/serial.c | |
| parent | 5a27f84855f3db8a6317389c034f8f507444185f (diff) | |
| parent | dafba16e6fc1837381c8e74c4891ad6965cf54ab (diff) | |
| download | u-boot-imx-6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7.zip u-boot-imx-6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7.tar.gz u-boot-imx-6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7.tar.bz2 | |
Merge with pollux.denx.org:/home/git/u-boot/.git
Diffstat (limited to 'cpu/ppc4xx/serial.c')
| -rw-r--r-- | cpu/ppc4xx/serial.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c index 92f8ddb..8cf7dab 100644 --- a/cpu/ppc4xx/serial.c +++ b/cpu/ppc4xx/serial.c @@ -269,14 +269,14 @@ int serial_tstc () #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || defined(CONFIG_405EP) #if defined(CONFIG_440) -#if defined(CONFIG_440_EP) || defined(CONFIG_440_GR) +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) #define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300 #define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400 #else #define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000200 #define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300 #endif -#if defined(CONFIG_440_GX) || defined(CONFIG_440_EP) || defined(CONFIG_440_GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) #define CR0_MASK 0xdfffffff #define CR0_EXTCLK_ENA 0x00800000 #define CR0_UDIV_POS 0 @@ -284,7 +284,7 @@ int serial_tstc () #define CR0_MASK 0x3fff0000 #define CR0_EXTCLK_ENA 0x00600000 #define CR0_UDIV_POS 16 -#endif /* CONFIG_440_GX */ +#endif /* CONFIG_440GX */ #elif defined(CONFIG_405EP) #define UART0_BASE 0xef600300 #define UART1_BASE 0xef600400 @@ -306,17 +306,17 @@ int serial_tstc () #if defined(CONFIG_UART1_CONSOLE) #define ACTING_UART0_BASE UART1_BASE #define ACTING_UART1_BASE UART0_BASE -#if defined(CONFIG_440_GX) || defined(CONFIG_440_EP) || defined(CONFIG_440_GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) #define UART0_SDR sdr_uart1 #define UART1_SDR sdr_uart0 -#endif /* CONFIG_440_GX */ +#endif /* CONFIG_440GX */ #else #define ACTING_UART0_BASE UART0_BASE #define ACTING_UART1_BASE UART1_BASE -#if defined(CONFIG_440_GX) || defined(CONFIG_440_EP) || defined(CONFIG_440_GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) #define UART0_SDR sdr_uart0 #define UART1_SDR sdr_uart1 -#endif /* CONFIG_440_GX */ +#endif /* CONFIG_440GX */ #endif #if defined(CONFIG_405EP) && defined(CFG_EXT_SERIAL_CLOCK) @@ -436,7 +436,7 @@ int serial_init(void) unsigned long tmp; #endif -#if defined(CONFIG_440_GX) +#if defined(CONFIG_440GX) #if defined(CONFIG_SERIAL_MULTI) if (UART0_BASE == dev_base) { mfsdr(UART0_SDR,reg); @@ -451,7 +451,7 @@ int serial_init(void) #endif #else reg = mfdcr(cntrl0) & ~CR0_MASK; -#endif /* CONFIG_440_GX */ +#endif /* CONFIG_440GX */ #ifdef CFG_EXT_SERIAL_CLOCK reg |= CR0_EXTCLK_ENA; udiv = 1; @@ -465,7 +465,7 @@ int serial_init(void) serial_divs (gd->baudrate, &udiv, &bdiv); #endif -#if defined(CONFIG_440_GX) || defined(CONFIG_440_EP) || defined(CONFIG_440_GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) reg |= udiv << CR0_UDIV_POS; /* set the UART divisor */ #if defined(CONFIG_SERIAL_MULTI) if (UART0_BASE == dev_base) { |