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author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /cpu/ppc4xx/sdram.h | |
parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/ppc4xx/sdram.h')
-rw-r--r-- | cpu/ppc4xx/sdram.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/cpu/ppc4xx/sdram.h b/cpu/ppc4xx/sdram.h index 4fb9b1a..bea3376 100644 --- a/cpu/ppc4xx/sdram.h +++ b/cpu/ppc4xx/sdram.h @@ -47,19 +47,19 @@ typedef struct sdram_conf_s sdram_conf_t; #define SDRAM0_TR_RFTA (31 - 29) #define SDRAM0_TR_RCD (31 - 31) -#ifdef CFG_SDRAM_CL +#ifdef CONFIG_SYS_SDRAM_CL /* SDRAM timings [ns] according to AMCC/IBM names (see SDRAM_faq.doc) */ -#define CFG_SDRAM_CASL CFG_SDRAM_CL -#define CFG_SDRAM_PTA CFG_SDRAM_tRP -#define CFG_SDRAM_CTP (CFG_SDRAM_tRC - CFG_SDRAM_tRCD - CFG_SDRAM_tRP) -#define CFG_SDRAM_LDF 0 -#ifdef CFG_SDRAM_tRFC -#define CFG_SDRAM_RFTA CFG_SDRAM_tRFC +#define CONFIG_SYS_SDRAM_CASL CONFIG_SYS_SDRAM_CL +#define CONFIG_SYS_SDRAM_PTA CONFIG_SYS_SDRAM_tRP +#define CONFIG_SYS_SDRAM_CTP (CONFIG_SYS_SDRAM_tRC - CONFIG_SYS_SDRAM_tRCD - CONFIG_SYS_SDRAM_tRP) +#define CONFIG_SYS_SDRAM_LDF 0 +#ifdef CONFIG_SYS_SDRAM_tRFC +#define CONFIG_SYS_SDRAM_RFTA CONFIG_SYS_SDRAM_tRFC #else -#define CFG_SDRAM_RFTA CFG_SDRAM_tRC +#define CONFIG_SYS_SDRAM_RFTA CONFIG_SYS_SDRAM_tRC #endif -#define CFG_SDRAM_RCD CFG_SDRAM_tRCD -#endif /* #ifdef CFG_SDRAM_CL */ +#define CONFIG_SYS_SDRAM_RCD CONFIG_SYS_SDRAM_tRCD +#endif /* #ifdef CONFIG_SYS_SDRAM_CL */ /* * Some defines for the 440 DDR controller |