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authorMatthias Fuchs <matthias.fuchs@esd.eu>2009-07-22 17:27:56 +0200
committerStefan Roese <sr@denx.de>2009-07-24 06:47:17 +0200
commit58ea142fb2e969f32306c8da1dabfaebd6fa141a (patch)
tree6f6054a161a5c439b29e85f874531093390623bc /cpu/ppc4xx/interrupts.c
parent87c0b72908e05662b8b415e26e1042f4779629da (diff)
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ppc4xx: Replace 4xx lowercase SPR references
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/interrupts.c')
-rw-r--r--cpu/ppc4xx/interrupts.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c
index 494bd8c..6db8421 100644
--- a/cpu/ppc4xx/interrupts.c
+++ b/cpu/ppc4xx/interrupts.c
@@ -102,15 +102,15 @@ int interrupt_init_cpu (unsigned *decrementer_count)
* Init PIT
*/
#if defined(CONFIG_440)
- val = mfspr( tcr );
+ val = mfspr( SPRN_TCR );
val &= (~0x04400000); /* clear DIS & ARE */
- mtspr( tcr, val );
- mtspr( dec, 0 ); /* Prevent exception after TSR clear*/
- mtspr( decar, 0 ); /* clear reload */
- mtspr( tsr, 0x08000000 ); /* clear DEC status */
+ mtspr( SPRN_TCR, val );
+ mtspr( SPRN_DEC, 0 ); /* Prevent exception after TSR clear*/
+ mtspr( SPRN_DECAR, 0 ); /* clear reload */
+ mtspr( SPRN_TSR, 0x08000000 ); /* clear DEC status */
val = gd->bd->bi_intfreq/1000; /* 1 msec */
- mtspr( decar, val ); /* Set auto-reload value */
- mtspr( dec, val ); /* Set inital val */
+ mtspr( SPRN_DECAR, val ); /* Set auto-reload value */
+ mtspr( SPRN_DEC, val ); /* Set inital val */
#else
set_pit(gd->bd->bi_intfreq / 1000);
#endif
@@ -126,9 +126,9 @@ int interrupt_init_cpu (unsigned *decrementer_count)
/*
* Enable PIT
*/
- val = mfspr(tcr);
+ val = mfspr(SPRN_TCR);
val |= 0x04400000;
- mtspr(tcr, val);
+ mtspr(SPRN_TCR, val);
/*
* Set EVPR to 0