diff options
author | Stefan Roese <sr@denx.de> | 2007-06-22 10:28:26 +0200 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2007-06-22 10:28:26 +0200 |
commit | e08e6453fced498b28950f36088c87c0b639a682 (patch) | |
tree | 5730c11e7440a6b88094d050172b8e5b4b707fbd /cpu/ppc4xx/gpio.c | |
parent | d7d5204ce2e0985ff2dfdf3a6b5b6a526cdb1c1e (diff) | |
parent | 83b4cfa3d629dff0264366263c5e94d9a50ad80b (diff) | |
download | u-boot-imx-e08e6453fced498b28950f36088c87c0b639a682.zip u-boot-imx-e08e6453fced498b28950f36088c87c0b639a682.tar.gz u-boot-imx-e08e6453fced498b28950f36088c87c0b639a682.tar.bz2 |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/ppc4xx/gpio.c')
-rw-r--r-- | cpu/ppc4xx/gpio.c | 42 |
1 files changed, 40 insertions, 2 deletions
diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c index dd84e58..5235203 100644 --- a/cpu/ppc4xx/gpio.c +++ b/cpu/ppc4xx/gpio.c @@ -103,6 +103,18 @@ void gpio_write_bit(int pin, int val) out32(GPIO0_OR + offs, in32(GPIO0_OR + offs) & ~GPIO_VAL(pin)); } +int gpio_read_out_bit(int pin) +{ + u32 offs = 0; + + if (pin >= GPIO_MAX) { + offs = 0x100; + pin -= GPIO_MAX; + } + + return (in32(GPIO0_OR + offs) & GPIO_VAL(pin) ? 1 : 0); +} + #if defined(CFG_440_GPIO_TABLE) void gpio_set_chip_configuration(void) { @@ -157,12 +169,38 @@ void gpio_set_chip_configuration(void) switch (gpio_tab[gpio_core][i].alt_nb) { case GPIO_SEL: if (gpio_core == GPIO0) { - reg = in32(GPIO0_TCR) | (0x80000000 >> (j)); + /* + * Setup output value + * 1 -> high level + * 0 -> low level + * else -> don't touch + */ + reg = in32(GPIO0_OR); + if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1) + reg |= (0x80000000 >> (i)); + else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0) + reg &= ~(0x80000000 >> (i)); + out32(GPIO0_OR, reg); + + reg = in32(GPIO0_TCR) | (0x80000000 >> (i)); out32(GPIO0_TCR, reg); } if (gpio_core == GPIO1) { - reg = in32(GPIO1_TCR) | (0x80000000 >> (j)); + /* + * Setup output value + * 1 -> high level + * 0 -> low level + * else -> don't touch + */ + reg = in32(GPIO0_OR); + if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1) + reg |= (0x80000000 >> (i)); + else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0) + reg &= ~(0x80000000 >> (i)); + out32(GPIO0_OR, reg); + + reg = in32(GPIO1_TCR) | (0x80000000 >> (i)); out32(GPIO1_TCR, reg); } |