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| author | John Rigby <jrigby@freescale.com> | 2007-07-10 14:58:41 -0600 |
|---|---|---|
| committer | John Rigby <jrigby@freescale.com> | 2007-07-10 14:58:41 -0600 |
| commit | 98c80b462f9532f3ff6a62dd9629023b48627a6d (patch) | |
| tree | bea13c7b7f892aa5875e737bd52535be50d96d25 /cpu/ppc4xx/gpio.c | |
| parent | 0dca874db62718e41253659e60f3a1de7eb418ce (diff) | |
| parent | 4ef218f6fdf8d747f4589da5252b004e7d2c2876 (diff) | |
| download | u-boot-imx-98c80b462f9532f3ff6a62dd9629023b48627a6d.zip u-boot-imx-98c80b462f9532f3ff6a62dd9629023b48627a6d.tar.gz u-boot-imx-98c80b462f9532f3ff6a62dd9629023b48627a6d.tar.bz2 | |
Merge branch 'master' into u-boot-5329-early
Diffstat (limited to 'cpu/ppc4xx/gpio.c')
| -rw-r--r-- | cpu/ppc4xx/gpio.c | 42 |
1 files changed, 40 insertions, 2 deletions
diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c index dd84e58..5235203 100644 --- a/cpu/ppc4xx/gpio.c +++ b/cpu/ppc4xx/gpio.c @@ -103,6 +103,18 @@ void gpio_write_bit(int pin, int val) out32(GPIO0_OR + offs, in32(GPIO0_OR + offs) & ~GPIO_VAL(pin)); } +int gpio_read_out_bit(int pin) +{ + u32 offs = 0; + + if (pin >= GPIO_MAX) { + offs = 0x100; + pin -= GPIO_MAX; + } + + return (in32(GPIO0_OR + offs) & GPIO_VAL(pin) ? 1 : 0); +} + #if defined(CFG_440_GPIO_TABLE) void gpio_set_chip_configuration(void) { @@ -157,12 +169,38 @@ void gpio_set_chip_configuration(void) switch (gpio_tab[gpio_core][i].alt_nb) { case GPIO_SEL: if (gpio_core == GPIO0) { - reg = in32(GPIO0_TCR) | (0x80000000 >> (j)); + /* + * Setup output value + * 1 -> high level + * 0 -> low level + * else -> don't touch + */ + reg = in32(GPIO0_OR); + if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1) + reg |= (0x80000000 >> (i)); + else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0) + reg &= ~(0x80000000 >> (i)); + out32(GPIO0_OR, reg); + + reg = in32(GPIO0_TCR) | (0x80000000 >> (i)); out32(GPIO0_TCR, reg); } if (gpio_core == GPIO1) { - reg = in32(GPIO1_TCR) | (0x80000000 >> (j)); + /* + * Setup output value + * 1 -> high level + * 0 -> low level + * else -> don't touch + */ + reg = in32(GPIO0_OR); + if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1) + reg |= (0x80000000 >> (i)); + else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0) + reg &= ~(0x80000000 >> (i)); + out32(GPIO0_OR, reg); + + reg = in32(GPIO1_TCR) | (0x80000000 >> (i)); out32(GPIO1_TCR, reg); } |