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authorStefan Roese <sr@denx.de>2008-06-02 17:22:11 +0200
committerStefan Roese <sr@denx.de>2008-06-03 20:22:13 +0200
commit192f90e272b3989ee7b4a666d1fdab831f20f8d2 (patch)
treeab950e845995e1d4a72107122ff35d07a350c0d6 /cpu/ppc4xx/ecc.c
parent39b32be18cd33b53a84065edcd4e465165cc5564 (diff)
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ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/ecc.c')
-rw-r--r--cpu/ppc4xx/ecc.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/cpu/ppc4xx/ecc.c b/cpu/ppc4xx/ecc.c
index 3e87c84..a2eb07b 100644
--- a/cpu/ppc4xx/ecc.c
+++ b/cpu/ppc4xx/ecc.c
@@ -45,7 +45,8 @@
#include "ecc.h"
-#if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
+#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR) || \
+ defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2)
#if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
/*
* void ecc_init()
@@ -118,4 +119,4 @@ void ecc_init(unsigned long * const start, unsigned long size)
SDRAM_ECC_CFG_MCHK_CHK));
}
#endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
-#endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */
+#endif /* defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)... */