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authorWolfgang Denk <wd@denx.de>2008-04-29 20:06:42 +0200
committerWolfgang Denk <wd@denx.de>2008-04-29 20:06:42 +0200
commit84666476841cef3ef6df5c5a2a110d43b0936999 (patch)
tree7db6eed156c8b285651f00155f7dd8407a7ab49d /cpu/ppc4xx/denali_spd_ddr2.c
parent3a427fd2ec3d980875a25327955c34a2de0b494c (diff)
parentf4c4d21a885ccc222fd0acdf653b683249e85117 (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Diffstat (limited to 'cpu/ppc4xx/denali_spd_ddr2.c')
-rw-r--r--cpu/ppc4xx/denali_spd_ddr2.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/cpu/ppc4xx/denali_spd_ddr2.c
index e20c9eb..ad805b9 100644
--- a/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/cpu/ppc4xx/denali_spd_ddr2.c
@@ -45,6 +45,7 @@
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/mmu.h>
+#include <asm/cache.h>
#if defined(CONFIG_SPD_EEPROM) && \
(defined(CONFIG_440EPX) || defined(CONFIG_440GRX))
@@ -92,7 +93,6 @@
extern int denali_wait_for_dlllock(void);
extern void denali_core_search_data_eye(void);
extern void dcbz_area(u32 start_address, u32 num_bytes);
-extern void dflush(void);
/*
* Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
@@ -1201,7 +1201,8 @@ long int initdram(int board_type)
#else
#error Please define CFG_MEM_TOP_HIDE (see README) in your board config file
#endif
- dflush();
+ /* Write modified dcache lines back to memory */
+ clean_dcache_range(CFG_SDRAM_BASE, CFG_SDRAM_BASE + dram_size - CFG_MEM_TOP_HIDE);
debug("Completed\n");
sync();
remove_tlb(CFG_SDRAM_BASE, dram_size);