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| author | stroese <stroese> | 2003-04-04 16:00:33 +0000 |
|---|---|---|
| committer | stroese <stroese> | 2003-04-04 16:00:33 +0000 |
| commit | baa3d528fe8f03c89bd9006819797db675632703 (patch) | |
| tree | ba95ea2851dae5995d9a2c5f6241112eb699173d /cpu/ppc4xx/cpu_init.c | |
| parent | c1551ea817c0a094b3e5c9573e5dcf4ca8204de6 (diff) | |
| download | u-boot-imx-baa3d528fe8f03c89bd9006819797db675632703.zip u-boot-imx-baa3d528fe8f03c89bd9006819797db675632703.tar.gz u-boot-imx-baa3d528fe8f03c89bd9006819797db675632703.tar.bz2 | |
Changed PPC405GPr version from A to B.
Diffstat (limited to 'cpu/ppc4xx/cpu_init.c')
| -rw-r--r-- | cpu/ppc4xx/cpu_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index 9bf180f..1d149bc 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -149,7 +149,7 @@ int cpu_init_r (void) * Set edge conditioning circuitry on PPC405GPr * for compatibility to existing PPC405GP designs. */ - if ((pvr & 0xfffffff0) == (PVR_405GPR_RA & 0xfffffff0)) { + if ((pvr & 0xfffffff0) == (PVR_405GPR_RB & 0xfffffff0)) { mtdcr(ecr, 0x60606000); } |