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author | Stefan Roese <sr@denx.de> | 2008-03-11 15:05:50 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2008-03-15 07:28:04 +0100 |
commit | 2801b2d2a9906f206ab9ee8d0b6e746d2b7fe05a (patch) | |
tree | dcc1e8265f699ac2e60818cb57cdf37abf6a201b /cpu/ppc4xx/cpu.c | |
parent | 8ac41e3e37c3080c6b1d9461d654161cfe2aa492 (diff) | |
download | u-boot-imx-2801b2d2a9906f206ab9ee8d0b6e746d2b7fe05a.zip u-boot-imx-2801b2d2a9906f206ab9ee8d0b6e746d2b7fe05a.tar.gz u-boot-imx-2801b2d2a9906f206ab9ee8d0b6e746d2b7fe05a.tar.bz2 |
ppc4xx: Add basic support for AMCC 460EX/460GT (2/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/cpu.c')
-rw-r--r-- | cpu/ppc4xx/cpu.c | 45 |
1 files changed, 43 insertions, 2 deletions
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 9e9c685..54cc256 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -54,7 +54,8 @@ static int pci_async_enabled(void) #endif #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) unsigned long val; mfsdr(sdr_sdstp1, val); @@ -86,7 +87,8 @@ static int pci_arbiter_enabled(void) return (val & 0x80000000); #endif #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) unsigned long val; mfsdr(sdr_pci0, val); @@ -167,6 +169,21 @@ static char *bootstrap_str[] = { static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' }; #endif +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) +#define SDR0_PINSTP_SHIFT 29 +static char *bootstrap_str[] = { + "EBC (8 bits)", + "EBC (16 bits)", + "PCI", + "PCI", + "EBC (16 bits)", + "NAND (8 bits)", + "I2C (Addr 0x54)", /* A8 */ + "I2C (Addr 0x52)", /* A4 */ +}; +static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' }; +#endif + #if defined(CONFIG_405EZ) #define SDR0_PINSTP_SHIFT 28 static char *bootstrap_str[] = { @@ -257,8 +274,12 @@ int checkcpu (void) puts("05"); #endif #if defined(CONFIG_440) +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) + puts("60"); +#else puts("40"); #endif +#endif switch (pvr) { case PVR_405GP_RB: @@ -448,6 +469,26 @@ int checkcpu (void) strcpy(addstr, "No RAID 6 support"); break; + case PVR_460EX_RA: + puts("EX Rev. A"); + strcpy(addstr, "No Security/Kasumi support"); + break; + + case PVR_460EX_SE_RA: + puts("EX Rev. A"); + strcpy(addstr, "Security/Kasumi support"); + break; + + case PVR_460GT_RA: + puts("GT Rev. A"); + strcpy(addstr, "No Security/Kasumi support"); + break; + + case PVR_460GT_SE_RA: + puts("GT Rev. A"); + strcpy(addstr, "Security/Kasumi support"); + break; + default: printf (" UNKNOWN (PVR=%08x)", pvr); break; |