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author | Stefan Roese <sr@denx.de> | 2007-10-23 11:31:05 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:20:51 +0100 |
commit | f10493c6d77a1e07a6c2ff4d772937a5e7359d6a (patch) | |
tree | 8fe61beee476893114183f23a17304ef486679c7 /cpu/ppc4xx/4xx_uart.c | |
parent | 353f2688b4e0fc7b969bc70a02be4b40bf0dd124 (diff) | |
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ppc4xx: Correct UART input clock calculation and passing to fdt
We now use a value in the gd (global data) structure for the UART input
frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely
in get_sys_info().
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/4xx_uart.c')
-rw-r--r-- | cpu/ppc4xx/4xx_uart.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/ppc4xx/4xx_uart.c b/cpu/ppc4xx/4xx_uart.c index c6b229f..ac2b12b 100644 --- a/cpu/ppc4xx/4xx_uart.c +++ b/cpu/ppc4xx/4xx_uart.c @@ -192,9 +192,9 @@ static void serial_init_common(u32 base, u32 udiv, u16 bdiv) * the UART divisor is available */ #ifdef CFG_EXT_SERIAL_CLOCK - sys_info.freqUART = CFG_EXT_SERIAL_CLOCK; + gd->uart_clk = CFG_EXT_SERIAL_CLOCK; #else - sys_info.freqUART = sys_info.freqUART / udiv; + gd->uart_clk = sys_info.freqUART / udiv; #endif out_8((u8 *)base + UART_LCR, 0x80); /* set DLAB bit */ |