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| author | Stefan Roese <sr@denx.de> | 2008-04-29 13:57:07 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-04-29 13:57:07 +0200 |
| commit | 85ad184b3b2b0f8af9228477303c55dca1b52ed7 (patch) | |
| tree | 53f6f23530d286249a22e1c65722954421681f27 /cpu/ppc4xx/44x_spd_ddr2.c | |
| parent | 135846d6ecaad255ad28d93ebbb78b3d5da68cdc (diff) | |
| download | u-boot-imx-85ad184b3b2b0f8af9228477303c55dca1b52ed7.zip u-boot-imx-85ad184b3b2b0f8af9228477303c55dca1b52ed7.tar.gz u-boot-imx-85ad184b3b2b0f8af9228477303c55dca1b52ed7.tar.bz2 | |
ppc4xx: Complete remove bogus dflush()
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Tested on Katmai with ECC DIMM.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/44x_spd_ddr2.c')
| -rw-r--r-- | cpu/ppc4xx/44x_spd_ddr2.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 9e722b9..5b5de48 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -40,6 +40,7 @@ #include <asm/io.h> #include <asm/processor.h> #include <asm/mmu.h> +#include <asm/cache.h> #if defined(CONFIG_SPD_EEPROM) && \ (defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ @@ -237,7 +238,6 @@ static void DQS_calibration_process(void); static void ppc440sp_sdram_register_dump(void); int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); void dcbz_area(u32 start_address, u32 num_bytes); -void dflush(void); static u32 mfdcr_any(u32 dcr) { @@ -2355,7 +2355,8 @@ static void program_ecc_addr(unsigned long start_address, } else { /* ECC bit set method for cached memory */ dcbz_area(start_address, num_bytes); - dflush(); + /* Write modified dcache lines back to memory */ + clean_dcache_range(start_address, start_address + num_bytes); } blank_string(strlen(str)); |