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| author | Stefan Roese <sr@denx.de> | 2007-10-31 20:51:10 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:47 +0100 |
| commit | 3db93b8bedd32e914b38976141b3fdf4ea3ff738 (patch) | |
| tree | 5b50d36fb3398a7a4e51b84f8763e5753dcd0cd8 /cpu/ppc4xx/44x_spd_ddr2.c | |
| parent | f71b2888b4b3c870909a0341427b2a914246f81f (diff) | |
| download | u-boot-imx-3db93b8bedd32e914b38976141b3fdf4ea3ff738.zip u-boot-imx-3db93b8bedd32e914b38976141b3fdf4ea3ff738.tar.gz u-boot-imx-3db93b8bedd32e914b38976141b3fdf4ea3ff738.tar.bz2 | |
ppc4xx: Enable CPU POST test for 4xx with dcache enabled
Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/44x_spd_ddr2.c')
0 files changed, 0 insertions, 0 deletions