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| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
| commit | 448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d (patch) | |
| tree | 022599b68a0e72f34f3f152f4a0056b557a06a44 /cpu/ppc4xx/44x_spd_ddr2.c | |
| parent | f2134f8e9eb006bdcd729e89f309c07b2fa45180 (diff) | |
| parent | 5ffa76a032279bc6d3230b703eda32d13305ba13 (diff) | |
| download | u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.zip u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.gz u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.bz2 | |
Merge branch 'upstream'
Diffstat (limited to 'cpu/ppc4xx/44x_spd_ddr2.c')
| -rw-r--r-- | cpu/ppc4xx/44x_spd_ddr2.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 2ecd3e4..48b9ee2 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -465,7 +465,11 @@ long int initdram(int board_type) * Set the SDRAM Clock Timing Register *-----------------------------------------------------------------*/ mfsdram(SDRAM_CLKTR, val); +#ifdef CFG_44x_DDR2_CKTR_180 + mtsdram(SDRAM_CLKTR, (val & ~SDRAM_CLKTR_CLKP_MASK) | SDRAM_CLKTR_CLKP_180_DEG_ADV); +#else mtsdram(SDRAM_CLKTR, (val & ~SDRAM_CLKTR_CLKP_MASK) | SDRAM_CLKTR_CLKP_0_DEG); +#endif /*------------------------------------------------------------------ * Program the BxCF registers. @@ -1117,7 +1121,8 @@ static void program_codt(unsigned long *dimm_populated, modt3 = 0x00000000; } if (total_rank == 4) { - codt |= CALC_ODT_R(0) | CALC_ODT_R(1) | CALC_ODT_R(2) | CALC_ODT_R(3); + codt |= CALC_ODT_R(0) | CALC_ODT_R(1) | + CALC_ODT_R(2) | CALC_ODT_R(3); modt0 = CALC_ODT_RW(2); modt1 = 0x00000000; modt2 = CALC_ODT_RW(0); |