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author | Wolfgang Denk <wd@pollux.denx.de> | 2005-08-05 23:55:19 +0200 |
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committer | Wolfgang Denk <wd@pollux.denx.de> | 2005-08-05 23:55:19 +0200 |
commit | d56019c0eed08632c2b1f828ca9e0b22d6151414 (patch) | |
tree | 8b0b6e6a0030b0946f8ccf543e025683c44cd36f /cpu/ppc4xx/405gp_enet.c | |
parent | b4f15fdaf77b7339e2984703c83269c7cdf680a9 (diff) | |
parent | 17f50f22bc3f2d17258523f2ef3074e6ce1f7ffa (diff) | |
download | u-boot-imx-d56019c0eed08632c2b1f828ca9e0b22d6151414.zip u-boot-imx-d56019c0eed08632c2b1f828ca9e0b22d6151414.tar.gz u-boot-imx-d56019c0eed08632c2b1f828ca9e0b22d6151414.tar.bz2 |
Merge with /home/sr/git/u-boot
Diffstat (limited to 'cpu/ppc4xx/405gp_enet.c')
-rw-r--r-- | cpu/ppc4xx/405gp_enet.c | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/cpu/ppc4xx/405gp_enet.c b/cpu/ppc4xx/405gp_enet.c index 9c17e31..b60d122 100644 --- a/cpu/ppc4xx/405gp_enet.c +++ b/cpu/ppc4xx/405gp_enet.c @@ -166,7 +166,6 @@ static void ppc_4xx_eth_halt (struct eth_device *dev) failsafe--; if (failsafe == 0) break; - } /* EMAC RESET */ @@ -223,18 +222,19 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) #endif /* MAL RESET */ - mtdcr (malmcr, MAL_CR_MMSR); - /* wait for reset */ - while (mfdcr (malmcr) & MAL_CR_MMSR) { - }; + mtdcr (malmcr, MAL_CR_MMSR); + /* wait for reset */ + while (mfdcr (malmcr) & MAL_CR_MMSR) { + }; + #if defined(CONFIG_440_EP) || defined(CONFIG_440_GR) out32 (ZMII_FER, 0); udelay(100); /* set RII mode */ out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); #elif defined(CONFIG_440) - /* set RMII mode */ - out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); + /* set RMII mode */ + out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); #endif /* CONFIG_440 */ /* MAL Channel RESET */ @@ -324,14 +324,11 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) (int) speed, (duplex == HALF) ? "HALF" : "FULL"); } -#if defined(CONFIG_440) - /* Errata 1.12: MAL_1 -- Disable MAL bursting */ - if( get_pvr() == PVR_440GP_RB) - mtdcr (malmcr, MAL_CR_OPBBL | MAL_CR_LEA | MAL_CR_PLBLT_DEFAULT); - else -#else mtdcr (malmcr, MAL_CR_PLBB | MAL_CR_OPBBL | MAL_CR_LEA | MAL_CR_PLBLT_DEFAULT); -#endif + /* Errata 1.12: MAL_1 -- Disable MAL bursting */ + if (get_pvr() == PVR_440GP_RB) { + mtdcr (malmcr, mfdcr(malmcr) & ~MAL_CR_PLBB); + } /* Free "old" buffers */ if (hw_p->alloc_tx_buf) @@ -418,6 +415,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) reg |= dev->enetaddr[5]; out32 (EMAC_IAL + hw_p->hw_addr, reg); + switch (devnum) { #if defined(CONFIG_NET_MULTI) case 1: @@ -498,7 +496,6 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) out32 (EMAC_RX_HI_LO_WMARK + hw_p->hw_addr, 0x0f002000); #endif - /* Frame gap set */ out32 (EMAC_I_FRAME_GAP_REG + hw_p->hw_addr, 0x00000008); |