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| author | Stefan Roese <sr@denx.de> | 2005-08-01 16:41:48 +0200 |
|---|---|---|
| committer | Stefan Roese <stefan@debian.(none)> | 2005-08-01 16:41:48 +0200 |
| commit | c157d8e219694f5c3dea1ed3826668bdc67ca093 (patch) | |
| tree | 0db7954a0b50e4b5f2a5da2e007ea82a965c6663 /cpu/ppc4xx/405gp_enet.c | |
| parent | 15f36a5efd31fe608b43dc197ebbd80d3cecbe44 (diff) | |
| download | u-boot-imx-c157d8e219694f5c3dea1ed3826668bdc67ca093.zip u-boot-imx-c157d8e219694f5c3dea1ed3826668bdc67ca093.tar.gz u-boot-imx-c157d8e219694f5c3dea1ed3826668bdc67ca093.tar.bz2 | |
Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
Patch by Steven Blakeslee, 27 Jul 2005
Diffstat (limited to 'cpu/ppc4xx/405gp_enet.c')
| -rw-r--r-- | cpu/ppc4xx/405gp_enet.c | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/cpu/ppc4xx/405gp_enet.c b/cpu/ppc4xx/405gp_enet.c index 9d8e2b6..9c17e31 100644 --- a/cpu/ppc4xx/405gp_enet.c +++ b/cpu/ppc4xx/405gp_enet.c @@ -227,7 +227,12 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) /* wait for reset */ while (mfdcr (malmcr) & MAL_CR_MMSR) { }; -#if defined(CONFIG_440) +#if defined(CONFIG_440_EP) || defined(CONFIG_440_GR) + out32 (ZMII_FER, 0); + udelay(100); + /* set RII mode */ + out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); +#elif defined(CONFIG_440) /* set RMII mode */ out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); #endif /* CONFIG_440 */ @@ -461,6 +466,18 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) out32(ZMII_SSR, in32(ZMII_SSR) | 0x10000000); else out32(ZMII_SSR, in32(ZMII_SSR) & ~0x10000000); +#if defined(CONFIG_440_EP) || defined(CONFIG_440_GR) + mfsdr(sdr_mfr, reg); + /* set speed */ + if (speed == _100BASET) { + out32(ZMII_SSR, in32(ZMII_SSR) | 0x10000000); + reg = (reg & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_RMII_100M; + } else { + reg = (reg & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_RMII_10M; + out32(ZMII_SSR, in32(ZMII_SSR) & ~0x10000000); + } + mtsdr(sdr_mfr, reg); +#endif #endif /* Enable broadcast and indvidual address */ @@ -498,11 +515,6 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) /* * Connect interrupt service routines */ -#if !defined(CONFIG_405EP) - /* 405EP has one EWU interrupt */ - irq_install_handler (VECNUM_EWU0 + (hw_p->devnum * 2), - (interrupt_handler_t *) enetInt, dev); -#endif irq_install_handler (VECNUM_ETH0 + (hw_p->devnum * 2), (interrupt_handler_t *) enetInt, dev); } @@ -993,12 +1005,6 @@ int ppc_4xx_eth_initialize (bd_t * bis) mtdcr (malrxdeir, 0xffffffff); /* clear pending interrupts */ mtdcr (malier, mal_ier); -#if defined(CONFIG_405EP) - /* 405EP has one EWU interrupt */ - irq_install_handler (VECNUM_EWU0, - (interrupt_handler_t *) enetInt, - dev); -#endif /* install MAL interrupt handler */ irq_install_handler (VECNUM_MS, (interrupt_handler_t *) enetInt, |