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author | Jon Loeliger <jdl@freescale.com> | 2007-08-27 12:41:03 -0500 |
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committer | Wolfgang Denk <wd@denx.de> | 2007-10-16 16:36:36 +0200 |
commit | 2491167c245d8ebe6f2dbd8c4287aaa0d14fe93a (patch) | |
tree | aacfd2e16eaf6bfc8fc5c5bdbba6c7dd52a5e9b0 /cpu/nios2 | |
parent | 4d4a945e189a2f384c66432316da2788a0ac1607 (diff) | |
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86xx: Allow for fewer DDR slots per memory controller.
As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.
Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'cpu/nios2')
0 files changed, 0 insertions, 0 deletions