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author | wdenk <wdenk> | 2004-10-10 21:27:30 +0000 |
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committer | wdenk <wdenk> | 2004-10-10 21:27:30 +0000 |
commit | 5c952cf0245421feb4644f2e71487c0b2e1dbd13 (patch) | |
tree | 47b80e839d339fe11dabd01ec8c89b46b791f797 /cpu/nios2/serial.c | |
parent | 03f5c55021c2d6297e66cc11bfea75f149a5d71c (diff) | |
download | u-boot-imx-5c952cf0245421feb4644f2e71487c0b2e1dbd13.zip u-boot-imx-5c952cf0245421feb4644f2e71487c0b2e1dbd13.tar.gz u-boot-imx-5c952cf0245421feb4644f2e71487c0b2e1dbd13.tar.bz2 |
Patches by Scott McNutt, 24 Aug 2004:
- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
Diffstat (limited to 'cpu/nios2/serial.c')
-rw-r--r-- | cpu/nios2/serial.c | 144 |
1 files changed, 144 insertions, 0 deletions
diff --git a/cpu/nios2/serial.c b/cpu/nios2/serial.c new file mode 100644 index 0000000..2d08c93 --- /dev/null +++ b/cpu/nios2/serial.c @@ -0,0 +1,144 @@ +/* + * (C) Copyright 2004, Psyent Corporation <www.psyent.com> + * Scott McNutt <smcnutt@psyent.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <common.h> +#include <watchdog.h> +#include <nios2.h> +#include <nios2-io.h> + +/*------------------------------------------------------------------ + * JTAG acts as the serial port + *-----------------------------------------------------------------*/ +#if defined(CONFIG_CONSOLE_JTAG) + +static nios_jtag_t *jtag = + (nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE); + +void serial_setbrg( void ){ return; } +int serial_init( void ) { return(0);} + +void serial_putc (char c) +{ + unsigned val; + + while (NIOS_JTAG_WSPACE (jtag->control) == 0) + WATCHDOG_RESET (); + jtag->data = (unsigned char)c; +} + +void serial_puts (const char *s) +{ + while (*s != 0) + serial_putc (*s++); +} + +int serial_tstc (void) +{ + return (jtag->control & NIOS_JTAG_RRDY); +} + +int serial_getc (void) +{ + int c; + unsigned val; + + while (1) { + WATCHDOG_RESET (); + val = jtag->data; + if (val & NIOS_JTAG_RVALID) + break; + } + c = val & 0x0ff; + return (c); +} + +/*------------------------------------------------------------------ + * UART the serial port + *-----------------------------------------------------------------*/ +#else + +static nios_uart_t *uart = (nios_uart_t *) + CACHE_BYPASS(CFG_NIOS_CONSOLE); + +#if defined(CFG_NIOS_FIXEDBAUD) + +/* Everything's already setup for fixed-baud PTF + * assignment + */ +void serial_setbrg (void){ return; } +int serial_init (void) { return (0);} + +#else + +void serial_setbrg (void) +{ + DECLARE_GLOBAL_DATA_PTR; + unsigned div; + + div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; + uart->divisor = div; + return; +} + +int serial_init (void) +{ + serial_setbrg (); + return (0); +} + +#endif /* CFG_NIOS_FIXEDBAUD */ + + +/*----------------------------------------------------------------------- + * UART CONSOLE + *---------------------------------------------------------------------*/ +void serial_putc (char c) +{ + if (c == '\n') + serial_putc ('\r'); + while ((uart->status & NIOS_UART_TRDY) == 0) + WATCHDOG_RESET (); + uart->txdata = (unsigned char)c; +} + +void serial_puts (const char *s) +{ + while (*s != 0) { + serial_putc (*s++); + } +} + +int serial_tstc (void) +{ + return (uart->status & NIOS_UART_RRDY); +} + +int serial_getc (void) +{ + while (serial_tstc () == 0) + WATCHDOG_RESET (); + return( uart->rxdata & 0x00ff ); +} + +#endif /* CONFIG_JTAG_CONSOLE */ |