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author | Kumar Gala <galak@kernel.crashing.org> | 2009-02-10 23:53:40 -0600 |
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committer | Andy Fleming <afleming@freescale.com> | 2009-02-16 18:05:55 -0600 |
commit | edf0e2524a8c6a3e91c009c496a0aa0ae89cd8ab (patch) | |
tree | c710c36056f4bd1486c1b5cbd306e64233a215c5 /cpu/mpc8xxx | |
parent | 8d949aff38cfb4388cbd73876e77bcd06d601f20 (diff) | |
download | u-boot-imx-edf0e2524a8c6a3e91c009c496a0aa0ae89cd8ab.zip u-boot-imx-edf0e2524a8c6a3e91c009c496a0aa0ae89cd8ab.tar.gz u-boot-imx-edf0e2524a8c6a3e91c009c496a0aa0ae89cd8ab.tar.bz2 |
fsl-ddr: Allow system to boot if we have more than 4G of memory
Previously if we >=4G of memory and !CONFIG_PHYS_64BIT we'd report
an error and hang. Instead of doing that since DDR is mapped in the
lowest priority LAWs we setup the DDR controller and the max amount
of memory we report back is what we can map (CONFIG_MAX_MEM_MAPPED)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc8xxx')
-rw-r--r-- | cpu/mpc8xxx/ddr/main.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc8xxx/ddr/main.c b/cpu/mpc8xxx/ddr/main.c index f1ad132..305f7fb 100644 --- a/cpu/mpc8xxx/ddr/main.c +++ b/cpu/mpc8xxx/ddr/main.c @@ -429,7 +429,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step) if (max_end >= 0xff) { printf("This U-Boot only supports < 4G of DDR\n"); printf("You could rebuild it with CONFIG_PHYS_64BIT\n"); - return 0; /* Ensure DDR setup failure. */ + return CONFIG_MAX_MEM_MAPPED; } #endif |