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author | Haiying Wang <Haiying.Wang@freescale.com> | 2008-10-03 12:37:10 -0400 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:05 +0200 |
commit | c9ffd839b1ada502c86f88edaf1534426b6688ce (patch) | |
tree | c9251caf137fc875168f5d4b38480b9a1b15e04e /cpu/mpc8xxx/ddr/ctrl_regs.c | |
parent | dfb49108e4f86c2224e1f30124328b0de66ef72e (diff) | |
download | u-boot-imx-c9ffd839b1ada502c86f88edaf1534426b6688ce.zip u-boot-imx-c9ffd839b1ada502c86f88edaf1534426b6688ce.tar.gz u-boot-imx-c9ffd839b1ada502c86f88edaf1534426b6688ce.tar.bz2 |
Check DDR interleaving mode
* Check DDR interleaving mode from environment by reading memctl_intlv_ctl and
ba_intlv_ctl.
* Print DDR interleaving mode information
* Add doc/README.fsl-ddr to describe the interleaving setting
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Diffstat (limited to 'cpu/mpc8xxx/ddr/ctrl_regs.c')
0 files changed, 0 insertions, 0 deletions