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authorWolfgang Denk <wd@pollux.denx.de>2006-08-07 23:21:52 +0200
committerWolfgang Denk <wd@pollux.denx.de>2006-08-07 23:21:52 +0200
commit98280e3d431db77d92219438b8840853bd7cb412 (patch)
treef771fe8d5086d32cda26a0b8d16f9b95e761838e /cpu/mpc8xx/speed.c
parent99d70e3a47affb9bae041a2caece7cd516e213b3 (diff)
parent6587f7e1e98bfcb7910a47bae2eb51e9a5fbd4da (diff)
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Merge with /home/wd/git/u-boot/master
Diffstat (limited to 'cpu/mpc8xx/speed.c')
-rw-r--r--cpu/mpc8xx/speed.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c
index 57f91c0..101d5f9 100644
--- a/cpu/mpc8xx/speed.c
+++ b/cpu/mpc8xx/speed.c
@@ -259,7 +259,11 @@ int get_clocks_866 (void)
*/
sccr_reg = immr->im_clkrst.car_sccr;
sccr_reg &= ~SCCR_EBDF11;
+#if defined(CONFIG_TQM885D)
+ if (gd->cpu_clk <= 80000000) {
+#else
if (gd->cpu_clk <= 66000000) {
+#endif
sccr_reg |= SCCR_EBDF00; /* bus division factor = 1 */
gd->bus_clk = gd->cpu_clk;
} else {
@@ -360,7 +364,8 @@ static long init_pll_866 (long clk)
#endif /* CONFIG_8xx_CPUCLK_DEFAULT */
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
+ && !defined(CONFIG_TQM885D)
/*
* Adjust sdram refresh rate to actual CPU clock
* and set timebase source according to actual CPU clock
@@ -384,6 +389,6 @@ int adjust_sdram_tbs_8xx (void)
return (0);
}
-#endif /* CONFIG_TQM8xxL/M, !TQM866M */
+#endif /* CONFIG_TQM8xxL/M, !TQM866M, !TQM885D */
/* ------------------------------------------------------------------------- */