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author | wdenk <wdenk> | 2003-07-17 23:16:40 +0000 |
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committer | wdenk <wdenk> | 2003-07-17 23:16:40 +0000 |
commit | 2535d60277cc295adf75cd5721dcecd840c69a63 (patch) | |
tree | a4a7c42580ded1e631658cec4f7a26d8e677a342 /cpu/mpc8xx/serial.c | |
parent | 945af8d723a29e9b6289d84250745ed0dc16fc81 (diff) | |
download | u-boot-imx-2535d60277cc295adf75cd5721dcecd840c69a63.zip u-boot-imx-2535d60277cc295adf75cd5721dcecd840c69a63.tar.gz u-boot-imx-2535d60277cc295adf75cd5721dcecd840c69a63.tar.bz2 |
* Patch by Martin Krause, 17 Jul 2003:
add delay to get I2C working with "imm" command and s3c24x0_i2c.c
* Patch by Richard Woodruff, 17 July 03:
- Fixed bug in OMAP1510 baud rate divisor settings.
* Patch by Nye Liu, 16 July 2003:
MPC860FADS fixes:
- add MPC86xADS support (uses MPC86xADS.h)
- add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
o PLPRCR changes
o BRG changes (EXTAL/XTAL restricted to 10MHz)
o don't trust gclk() software measurement by default, depend on
CONFIG_8xx_GCLK_FREQ
- add DRAM SIMM not installed detection
- use more "correct" SDRAM initialization sequence
- allow different SDRAM sizes (8xxADS has 8M)
- default DER is 0
- remove unused MAMR defines from FADS860T.h (all done in fads.c)
- rename MAMR/MBMR defines to be more consistent. Should eventually
be merged into MxMR to better reflect the PowerQUICC datasheet.
* Patch by Yuli Barcohen, 16 Jul 2003:
support new Motorola PQ2FADS-ZU evaluation board which replaced
MPC8260ADS and MPC8266ADS
Diffstat (limited to 'cpu/mpc8xx/serial.c')
-rw-r--r-- | cpu/mpc8xx/serial.c | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c index 81c0279..5ca4d90 100644 --- a/cpu/mpc8xx/serial.c +++ b/cpu/mpc8xx/serial.c @@ -68,6 +68,23 @@ #error "console not correctly defined" #endif +static void serial_setdivisor(volatile cpm8xx_t *cp) +{ + DECLARE_GLOBAL_DATA_PTR; + int divisor=gd->cpu_clk/16/gd->baudrate; + + if(divisor/16>0x1000) { + /* bad divisor, assume 50Mhz clock and 9600 baud */ + divisor=(50*1000*1000)/16/9600; + } + + if(divisor<=0x1000) { + cp->cp_brgc1=((divisor-1)<<1) | CPM_BRG_EN; + } else { + cp->cp_brgc1=((divisor/16-1)<<1) | CPM_BRG_EN | CPM_BRG_DIV16; + } +} + #if (defined (CONFIG_8xx_CONS_SMC1) || defined (CONFIG_8xx_CONS_SMC2)) /* @@ -229,8 +246,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); @@ -242,8 +257,7 @@ serial_setbrg (void) cp->cp_simode = 0x00000000; - cp->cp_brgc1 = - (((gd->cpu_clk / 16 / gd->baudrate)-1) << 1) | CPM_BRG_EN; + serial_setdivisor(cp); } #ifdef CONFIG_MODEM_SUPPORT @@ -506,8 +520,6 @@ int serial_init (void) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); @@ -518,10 +530,8 @@ serial_setbrg (void) */ cp->cp_sicr &= ~(0x000000FF << (8 * SCC_INDEX)); - /* no |= needed, since BRG1 is 000 */ - cp->cp_brgc1 = - (((gd->cpu_clk / 16 / gd->baudrate)-1) << 1) | CPM_BRG_EN; + serial_setdivisor(cp); } void |