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| author | wdenk <wdenk> | 2004-01-04 16:28:35 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-01-04 16:28:35 +0000 |
| commit | 180d3f74e4738ee107e269cbb949481075dd789a (patch) | |
| tree | ce40863d3e1b3ff07a5027d788ff1fdb5416d0d7 /cpu/mpc8xx/cpu_init.c | |
| parent | dd875c767e6fb0f4fecfb799b706d84562a7acee (diff) | |
| download | u-boot-imx-180d3f74e4738ee107e269cbb949481075dd789a.zip u-boot-imx-180d3f74e4738ee107e269cbb949481075dd789a.tar.gz u-boot-imx-180d3f74e4738ee107e269cbb949481075dd789a.tar.bz2 | |
* Fix problems caused by Robert Schwebel's cramfs patch
* Patch by Scott McNutt, 02 Jan 2004:
Add support for the Nios Active Serial Memory Interface (ASMI)
on Cyclone devices
* Patch by Andrea Marson, 16 Dec 2003:
Add support for the PPChameleon ME and HI modules
* Patch by Yuli Barcohen, 22 Dec 2003:
Add support for Motorola DUET ADS board (MPC87x/88x)
Diffstat (limited to 'cpu/mpc8xx/cpu_init.c')
| -rw-r--r-- | cpu/mpc8xx/cpu_init.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c index 8f06dd1..cbf2126 100644 --- a/cpu/mpc8xx/cpu_init.c +++ b/cpu/mpc8xx/cpu_init.c @@ -42,6 +42,7 @@ void cpu_init_f (volatile immap_t * immr) { #ifndef CONFIG_MBX volatile memctl8xx_t *memctl = &immr->im_memctl; + ulong mfmask; #endif ulong reg; @@ -86,16 +87,23 @@ void cpu_init_f (volatile immap_t * immr) /* If CFG_PLPRCR (set in the various *_config.h files) tries to * set the MF field, then just copy CFG_PLPRCR over car_plprcr, - * otherwise OR in CFG_PLPRCR so we do not change the currentMF + * otherwise OR in CFG_PLPRCR so we do not change the current MF * field value. + * + * For newer (starting MPC866) chips PLPRCR layout is different. */ -#if ((CFG_PLPRCR & PLPRCR_MF_MSK) != 0) - reg = CFG_PLPRCR; /* reset control bits */ -#else - reg = immr->im_clkrst.car_plprcr; - reg &= PLPRCR_MF_MSK; /* isolate MF field */ - reg |= CFG_PLPRCR; /* reset control bits */ -#endif + if (get_immr(0xFFFF) >= MPC8xx_NEW_CLK) + mfmask = PLPRCR_MFACT_MSK; + else + mfmask = PLPRCR_MF_MSK; + + if ((CFG_PLPRCR & mfmask) != 0) + reg = CFG_PLPRCR; /* reset control bits */ + else { + reg = immr->im_clkrst.car_plprcr; + reg &= mfmask; /* isolate MF-related fields */ + reg |= CFG_PLPRCR; /* reset control bits */ + } immr->im_clkrst.car_plprcr = reg; /* |