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authorwdenk <wdenk>2004-01-24 20:25:54 +0000
committerwdenk <wdenk>2004-01-24 20:25:54 +0000
commitc178d3da6f1ac765cd880530a0672540b415a01c (patch)
tree67e3b8e9a791d2ec97798239b5abba15e0cb5aaf /cpu/mpc8xx/cpu_init.c
parentef978730dcb3e7e398fe9b57633f3f67260c1bbc (diff)
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* Add variable CPU clock for MPC859/866 systems (so far only TQM866M):
see doc/README.MPC866 for details; implement workaround for "SIU4" and "SIU9" silicon bugs on MPC866; calculate CPU clock frequency from PLL register values. * Add support for 128 MB RAM on TQM8xxL/M modules
Diffstat (limited to 'cpu/mpc8xx/cpu_init.c')
-rw-r--r--cpu/mpc8xx/cpu_init.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c
index cbf2126..c7716dd 100644
--- a/cpu/mpc8xx/cpu_init.c
+++ b/cpu/mpc8xx/cpu_init.c
@@ -42,7 +42,9 @@ void cpu_init_f (volatile immap_t * immr)
{
#ifndef CONFIG_MBX
volatile memctl8xx_t *memctl = &immr->im_memctl;
+# ifdef CFG_PLPRCR
ulong mfmask;
+# endif
#endif
ulong reg;
@@ -92,6 +94,7 @@ void cpu_init_f (volatile immap_t * immr)
*
* For newer (starting MPC866) chips PLPRCR layout is different.
*/
+#ifdef CFG_PLPRCR
if (get_immr(0xFFFF) >= MPC8xx_NEW_CLK)
mfmask = PLPRCR_MFACT_MSK;
else
@@ -105,6 +108,7 @@ void cpu_init_f (volatile immap_t * immr)
reg |= CFG_PLPRCR; /* reset control bits */
}
immr->im_clkrst.car_plprcr = reg;
+#endif
/*
* Memory Controller: