diff options
| author | Jon Loeliger <jdl@freescale.com> | 2007-08-02 14:42:20 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-08-10 11:02:32 -0500 |
| commit | cfc7a7f5bb3273c9951173c788001d45118f141f (patch) | |
| tree | f321b9a57ce6d32567df53a53f9d97bbc9ee9665 /cpu/mpc86xx/traps.c | |
| parent | 99c2fdab91bc633e46fb41dbaa629f87ccf6e00f (diff) | |
| download | u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.zip u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.tar.gz u-boot-imx-cfc7a7f5bb3273c9951173c788001d45118f141f.tar.bz2 | |
cpu/86xx fixes.
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'cpu/mpc86xx/traps.c')
| -rw-r--r-- | cpu/mpc86xx/traps.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/cpu/mpc86xx/traps.c b/cpu/mpc86xx/traps.c index fab1975..c84bfbf 100644 --- a/cpu/mpc86xx/traps.c +++ b/cpu/mpc86xx/traps.c @@ -130,8 +130,11 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ", regs); - switch (regs->msr & 0x000F0000) { - case (0x80000000 >> 12): + switch ( regs->msr & 0x001F0000) { + case (0x80000000>>11): + printf("MSS error. MSSSR0: %08x\n", mfspr(SPRN_MSSSR0)); + break; + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; @@ -209,6 +212,7 @@ UnknownException(struct pt_regs *regs) if (debugger_exception_handler && (*debugger_exception_handler) (regs)) return; #endif + printf("UnknownException regs@%x\n", regs); printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", regs->nip, regs->msr, regs->trap); _exception(0, regs); |