Cleanup whitespaces and style issues.

Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.

1 files changed, 126 insertions, 134 deletions

diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c
index 0f5a638..a08ae5f 100644
--- a/cpu/mpc86xx/speed.c
+++ b/cpu/mpc86xx/speed.c
@@ -33,9 +33,7 @@ unsigned long get_board_sys_clk(ulong dummy);
 unsigned long get_sysclk_from_px_regs(void);
 
 
-/* --------------------------------------------------------------- */
-
-void get_sys_info (sys_info_t * sysInfo)
+void get_sys_info (sys_info_t *sysInfo)
 {
 	volatile immap_t    *immap = (immap_t *)CFG_IMMR;
 	volatile ccsr_gur_t *gur = &immap->im_gur;
@@ -43,7 +41,7 @@ void get_sys_info (sys_info_t * sysInfo)
 
        	plat_ratio = (gur->porpllsr) & 0x0000003e;
 	plat_ratio >>= 1;
-	
+
 	switch(plat_ratio) {
         case 0x0:
 		sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
@@ -65,72 +63,77 @@ void get_sys_info (sys_info_t * sysInfo)
 		break;
 	}
 
-        //        printf("assigned system bus freq = %d for plat ratio 0x%08lx\n", sysInfo->freqSystemBus, plat_ratio);
+#if 0
+        printf("assigned system bus freq = %d for plat ratio 0x%08lx\n",
+	       sysInfo->freqSystemBus, plat_ratio);
+#endif
+
 	e600_ratio = (gur->porpllsr) & 0x003f0000;
 	e600_ratio >>= 16;
-	switch(e600_ratio) {     
+
+	switch (e600_ratio) {
 	case 0x10:
-		sysInfo->freqProcessor = 2*sysInfo->freqSystemBus;
+		sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
 		break;
-        case 0x19:                
-		sysInfo->freqProcessor = 5*sysInfo->freqSystemBus/2;
+        case 0x19:
+		sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus/2;
 		break;
 	case 0x20:
-		sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
+		sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
 		break;
         case 0x39:
-		sysInfo->freqProcessor = 7*sysInfo->freqSystemBus/2;
+		sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus/2;
 		break;
 	case 0x28:
-		sysInfo->freqProcessor = 4*sysInfo->freqSystemBus;
+		sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
 		break;
 	case 0x1d:
-		sysInfo->freqProcessor = 9*sysInfo->freqSystemBus/2;
+		sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus/2;
 		break;
        	default:
-	  /* JB - Emulator workaround until real cop is plugged in */
-	  sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
-	  //sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
+		/* JB - Emulator workaround until real cop is plugged in */
+		/* sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus; */
+		sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
 		break;
 	}
-        //        printf("assigned processor freq = %d for e600 ratio 0x%08lx\n", sysInfo->freqProcessor, e600_ratio);
-
+#if 0
+        printf("assigned processor freq = %d for e600 ratio 0x%08lx\n",
+	       sysInfo->freqProcessor, e600_ratio);
+#endif
 }
 
 
-/* ------------------------------------------------------------------------- */
-
 /*
  * Measure CPU clock speed (core clock GCLK1, GCLK2)
- *
  * (Approx. GCLK frequency in Hz)
  */
 
-int get_clocks (void)
+int get_clocks(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 	sys_info_t sys_info;
 
-	get_sys_info (&sys_info);
+	get_sys_info(&sys_info);
 	gd->cpu_clk = sys_info.freqProcessor;
 	gd->bus_clk = sys_info.freqSystemBus;
-	
-	if(gd->cpu_clk != 0) return (0);
-	else return (1);
+
+	if (gd->cpu_clk != 0)
+		return 0;
+	else
+		return 1;
 }
 
-/* ------------------------------------------------------------------------- */
-/********************************************
+
+/*
  * get_bus_freq
- * return system bus freq in Hz
- *********************************************/
-ulong get_bus_freq (ulong dummy)
+ *	Return system bus freq in Hz
+ */
+ulong get_bus_freq(ulong dummy)
 {
 	ulong val;
-
 	sys_info_t sys_info;
 
-	get_sys_info (&sys_info);
+	get_sys_info(&sys_info);
 	val = sys_info.freqSystemBus;
 
 	return val;
@@ -138,111 +141,100 @@ ulong get_bus_freq (ulong dummy)
 
 unsigned long get_sysclk_from_px_regs()
 {
-   ulong val;
-   u8 vclkh,vclkl;
-   
-   vclkh = in8(PIXIS_BASE+PIXIS_VCLKH);
-   vclkl = in8(PIXIS_BASE+PIXIS_VCLKL);
-   
-   if((vclkh == 0x84) && (vclkl ==0x07))
-   {
-      val = 33000000;
-   }
-   if((vclkh == 0x3F) && (vclkl ==0x20))
-   {
-      val = 40000000;
-   }
-   if((vclkh == 0x3F) && (vclkl ==0x2A))
-   {
-      val = 50000000;
-   }
-   if((vclkh == 0x24) && (vclkl ==0x04))
-   {
-      val = 66000000;
-   }
-   if((vclkh == 0x3F) && (vclkl ==0x4B))
-   {
-      val = 83000000;
-   }
-   if((vclkh == 0x3F) && (vclkl ==0x5C))
-   {
-      val = 100000000;
-   }
-   if((vclkh == 0xDF) && (vclkl ==0x3B))
-   {
-      val = 134000000;
-   }
-   if((vclkh == 0xDF) && (vclkl ==0x4B))
-   {
-      val = 166000000;
-   }
-   
-   return val;
+	ulong val;
+	u8 vclkh, vclkl;
+
+	vclkh = in8(PIXIS_BASE + PIXIS_VCLKH);
+	vclkl = in8(PIXIS_BASE + PIXIS_VCLKL);
+	
+	if ((vclkh == 0x84) && (vclkl == 0x07)) {
+		val = 33000000;
+	}
+	if ((vclkh == 0x3F) && (vclkl == 0x20)) {
+		val = 40000000;
+	}
+	if ((vclkh == 0x3F) && (vclkl == 0x2A)) {
+		val = 50000000;
+	}
+	if ((vclkh == 0x24) && (vclkl == 0x04)) {
+		val = 66000000;
+	}
+	if ((vclkh == 0x3F) && (vclkl == 0x4B)) {
+		val = 83000000;
+	}
+	if ((vclkh == 0x3F) && (vclkl == 0x5C)) {
+		val = 100000000;
+	}
+	if ((vclkh == 0xDF) && (vclkl == 0x3B)) {
+		val = 134000000;
+	}
+	if ((vclkh == 0xDF) && (vclkl == 0x4B)) {
+		val = 166000000;
+	}
+
+	return val;
 }
 
-/******* From MPC8641HPCN Design Workbook ************
- *
+
+/*
  * get_board_sys_clk
- * reads the FPGA on board for CONFIG_SYS_CLK_FREQ
- *
- ********************************************************/
+ *	Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
+ */
 
 unsigned long get_board_sys_clk(ulong dummy)
 {
-   u8 i, go_bit, rd_clks;
-   ulong val;
-
-   go_bit = in8(PIXIS_BASE+PIXIS_VCTL);
-   go_bit &= 0x01;
-
-   rd_clks = in8(PIXIS_BASE+PIXIS_VCFGEN0);
-   rd_clks &= 0x1C;
-
-   /* Only if both go bit and the SCLK bit in VCFGEN0 are set
-    * should we be using the AUX register. Remember, we also set the
-    * GO bit to boot from the alternate bank on the on-board flash
-    */
-   
-   if(go_bit)
-   {
-      if(rd_clks == 0x1c)
-         i = in8(PIXIS_BASE+PIXIS_AUX);
-      else
-         i = in8(PIXIS_BASE+PIXIS_SPD);
-      //val = get_sysclk_from_px_regs();
-   }
-   else
-      i = in8(PIXIS_BASE+PIXIS_SPD);
-   
-   i &= 0x07;
-      
-   switch(i)
-   {
-      case 0:
-         val = 33000000;
-         break;
-      case 1:
-         val = 40000000;
-         break;
-      case 2:
-         val = 50000000;
-         break;
-      case 3:
-         val = 66000000;
-         break;
-      case 4:
-         val = 83000000;
-         break;
-      case 5:
-         val = 100000000;
-         break;
-      case 6:
-         val = 134000000;
-         break;
-      case 7:
-         val = 166000000;
-         break;
-   }
-   
-   return val;
+	u8 i, go_bit, rd_clks;
+	ulong val;
+
+	go_bit = in8(PIXIS_BASE + PIXIS_VCTL);
+	go_bit &= 0x01;
+
+	rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0);
+	rd_clks &= 0x1C;
+
+	/*
+	 * Only if both go bit and the SCLK bit in VCFGEN0 are set
+	 * should we be using the AUX register. Remember, we also set the
+	 * GO bit to boot from the alternate bank on the on-board flash
+	 */
+
+	if (go_bit) {
+		if (rd_clks == 0x1c)
+			i = in8(PIXIS_BASE + PIXIS_AUX);
+		else
+			i = in8(PIXIS_BASE + PIXIS_SPD);
+	} else {
+		i = in8(PIXIS_BASE + PIXIS_SPD);
+	}
+
+	i &= 0x07;
+
+	switch (i) {
+	case 0:
+		val = 33000000;
+		break;
+	case 1:
+		val = 40000000;
+		break;
+	case 2:
+		val = 50000000;
+		break;
+	case 3:
+		val = 66000000;
+		break;
+	case 4:
+		val = 83000000;
+		break;
+	case 5:
+		val = 100000000;
+		break;
+	case 6:
+		val = 134000000;
+		break;
+	case 7:
+		val = 166000000;
+		break;
+	}
+
+	return val;
 }