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authorStefan Roese <sr@denx.de>2006-11-10 07:48:47 +0100
committerStefan Roese <sr@denx.de>2006-11-10 07:48:47 +0100
commitdfc8a9ee0040e53ada125a3c52f241e37f09cf28 (patch)
tree60fd3973150a4e6b3d9d129d117ecab71b5edabe /cpu/mpc86xx/speed.c
parent5c912cb1c31266c66ca59b36f9b6f87296421d75 (diff)
parent91650b3e4de688038d4f71279c44858e3e2c6870 (diff)
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Merge with /home/stefan/git/u-boot/denx
Diffstat (limited to 'cpu/mpc86xx/speed.c')
-rw-r--r--cpu/mpc86xx/speed.c127
1 files changed, 127 insertions, 0 deletions
diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c
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+/*
+ * Copyright 2004 Freescale Semiconductor.
+ * Jeff Brown
+ * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
+ *
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc86xx.h>
+#include <asm/processor.h>
+
+
+void get_sys_info(sys_info_t *sysInfo)
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ uint plat_ratio, e600_ratio;
+
+ plat_ratio = (gur->porpllsr) & 0x0000003e;
+ plat_ratio >>= 1;
+
+ switch (plat_ratio) {
+ case 0x0:
+ sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
+ break;
+ case 0x02:
+ case 0x03:
+ case 0x04:
+ case 0x05:
+ case 0x06:
+ case 0x08:
+ case 0x09:
+ case 0x0a:
+ case 0x0c:
+ case 0x10:
+ sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+ break;
+ default:
+ sysInfo->freqSystemBus = 0;
+ break;
+ }
+
+ e600_ratio = (gur->porpllsr) & 0x003f0000;
+ e600_ratio >>= 16;
+
+ switch (e600_ratio) {
+ case 0x10:
+ sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
+ break;
+ case 0x19:
+ sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
+ break;
+ case 0x20:
+ sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
+ break;
+ case 0x39:
+ sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
+ break;
+ case 0x28:
+ sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
+ break;
+ case 0x1d:
+ sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
+ break;
+ default:
+ sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
+ break;
+ }
+}
+
+
+/*
+ * Measure CPU clock speed (core clock GCLK1, GCLK2)
+ * (Approx. GCLK frequency in Hz)
+ */
+
+int get_clocks(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ sys_info_t sys_info;
+
+ get_sys_info(&sys_info);
+ gd->cpu_clk = sys_info.freqProcessor;
+ gd->bus_clk = sys_info.freqSystemBus;
+
+ if (gd->cpu_clk != 0)
+ return 0;
+ else
+ return 1;
+}
+
+
+/*
+ * get_bus_freq
+ * Return system bus freq in Hz
+ */
+
+ulong get_bus_freq(ulong dummy)
+{
+ ulong val;
+ sys_info_t sys_info;
+
+ get_sys_info(&sys_info);
+ val = sys_info.freqSystemBus;
+
+ return val;
+}