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author | Stefan Roese <sr@denx.de> | 2007-12-11 11:34:54 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-12-11 11:34:54 +0100 |
commit | 9caeaadf508cd0e11ac5dfc56ab0f72e3b89a105 (patch) | |
tree | 1afcc9c20c04e19870ab5e2996104877695c54a3 /cpu/mpc86xx/spd_sdram.c | |
parent | 7cfc12a7dcfdb350e2ab76db4dafcc30f7e77c2b (diff) | |
parent | 41be969f4957115ed7b1fe8b890bfaee99d7a7a2 (diff) | |
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Merge commit 'u-boot/master' into for-1.3.1
Conflicts:
drivers/rtc/Makefile
Diffstat (limited to 'cpu/mpc86xx/spd_sdram.c')
-rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 059097f..265e033 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -1114,8 +1114,10 @@ spd_sdram(void) int memsize_ddr1 = 0; unsigned int law_size_ddr1; volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; +#ifdef CONFIG_DDR_INTERLEAVE + volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; +#endif #if (CONFIG_NUM_DDR_CONTROLLERS > 1) int memsize_ddr2_dimm1 = 0; @@ -1270,10 +1272,12 @@ spd_sdram(void) debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8); debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8); } + + debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2); + #endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */ - debug("\nMemory sizes are DDR1 = 0x%08lx, DDR2 = 0x%08lx\n", - memsize_ddr1, memsize_ddr2); + debug("\nMemory size of DDR1 = 0x%08lx\n", memsize_ddr1); /* * If neither DDR controller is enabled return 0. |