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authorWolfgang Denk <wd@denx.de>2009-04-01 22:43:51 +0200
committerWolfgang Denk <wd@denx.de>2009-04-01 22:43:51 +0200
commitda72af8d727e74093e5fcb3e8599eb8d0df7a749 (patch)
tree8937781ff72c3841e2352863e3060f0b1a1808ed /cpu/mpc86xx/mp.c
parentc2eb8be7f760a2efe30a495bfb10857838dcf3fa (diff)
parentfc39c2fd51e64707de4d61ed49479ebea2847e1b (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'cpu/mpc86xx/mp.c')
-rw-r--r--cpu/mpc86xx/mp.c51
1 files changed, 33 insertions, 18 deletions
diff --git a/cpu/mpc86xx/mp.c b/cpu/mpc86xx/mp.c
index 5014401..2940673 100644
--- a/cpu/mpc86xx/mp.c
+++ b/cpu/mpc86xx/mp.c
@@ -4,20 +4,45 @@
#include <ioports.h>
#include <lmb.h>
#include <asm/io.h>
-#include "mp.h"
+#include <asm/mp.h>
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_NUM_CPUS > 1)
-void cpu_mp_lmb_reserve(struct lmb *lmb)
+int cpu_reset(int nr)
+{
+ /* dummy function so common/cmd_mp.c will build
+ * should be implemented in the future, when cpu_release()
+ * is supported. Be aware there may be a similiar bug
+ * as exists on MPC85xx w/its PIC having a timing window
+ * associated to resetting the core */
+ return 1;
+}
+
+int cpu_status(int nr)
{
- u32 bootpg;
+ /* dummy function so common/cmd_mp.c will build */
+ return 0;
+}
+
+int cpu_release(int nr, int argc, char *argv[])
+{
+ /* dummy function so common/cmd_mp.c will build
+ * should be implemented in the future */
+ return 1;
+}
+u32 determine_mp_bootpg(void)
+{
/* if we have 4G or more of memory, put the boot page at 4Gb-1M */
if ((u64)gd->ram_size > 0xfffff000)
- bootpg = 0xfff00000;
- else
- bootpg = gd->ram_size - (1024 * 1024);
+ return (0xfff00000);
+
+ return (gd->ram_size - (1024 * 1024));
+}
+
+void cpu_mp_lmb_reserve(struct lmb *lmb)
+{
+ u32 bootpg = determine_mp_bootpg();
/* tell u-boot we stole a page */
lmb_reserve(lmb, bootpg, 4096);
@@ -31,18 +56,9 @@ void setup_mp(void)
{
extern ulong __secondary_start_page;
ulong fixup = (ulong)&__secondary_start_page;
- u32 bootpg;
+ u32 bootpg = determine_mp_bootpg();
u32 bootpg_va;
- /*
- * If we have 4G or more of memory, put the boot page at 4Gb-1M.
- * Otherwise, put it at the very end of RAM.
- */
- if (gd->ram_size > 0xfffff000)
- bootpg = 0xfff00000;
- else
- bootpg = gd->ram_size - (1024 * 1024);
-
if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) {
/* We're not covered by the DDR mapping, set up BAT */
write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K |
@@ -65,4 +81,3 @@ void setup_mp(void)
out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 |
(bootpg >> 12));
}
-#endif