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authorWolfgang Denk <wd@denx.de>2009-07-23 00:52:25 +0200
committerWolfgang Denk <wd@denx.de>2009-07-23 00:52:25 +0200
commit5a625149dbe14d381df454c459c6aaf27d59af20 (patch)
tree52570b954668965789bacc9bb488312b58f7cc3e /cpu/mpc86xx/ddr-8641.c
parent46edbc545d1d0ae166271488e89c9967fb54393f (diff)
parent048e7efe91f66094f868281c12e488ce2bae8976 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'cpu/mpc86xx/ddr-8641.c')
-rw-r--r--cpu/mpc86xx/ddr-8641.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mpc86xx/ddr-8641.c b/cpu/mpc86xx/ddr-8641.c
index 51d0102..b8f2c93 100644
--- a/cpu/mpc86xx/ddr-8641.c
+++ b/cpu/mpc86xx/ddr-8641.c
@@ -56,7 +56,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(&ddr->timing_cfg_1, regs->timing_cfg_1);
out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2);
out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2);
- out_be32(&ddr->sdram_mode_1, regs->ddr_sdram_mode);
+ out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
out_be32(&ddr->sdram_mode_2, regs->ddr_sdram_mode_2);
out_be32(&ddr->sdram_mode_cntl, regs->ddr_sdram_md_cntl);
out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
@@ -74,7 +74,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
udelay(200);
asm volatile("sync;isync");
- out_be32(&ddr->sdram_cfg_1, regs->ddr_sdram_cfg);
+ out_be32(&ddr->sdram_cfg, regs->ddr_sdram_cfg);
/*
* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done