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authorJon Loeliger <jdl@freescale.com>2006-04-27 10:15:16 -0500
committerJon Loeliger <jdl@freescale.com>2006-04-27 10:15:16 -0500
commit5c9efb36a6b5431423f52888a0e3b4b515fe7eca (patch)
treeb4e456a06357346267f16a636af658cc85bf5b64 /cpu/mpc86xx/cpu_init.c
parenta2320a6bf8113a09544c42d160d10ac69d049a03 (diff)
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Cleanup whitespaces and style issues.
Removed //-style comments. Use 80-column lines. Remove trailing whitespace. Remove dead code and debug cruft.
Diffstat (limited to 'cpu/mpc86xx/cpu_init.c')
-rw-r--r--cpu/mpc86xx/cpu_init.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 582ac6b..c816c18 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -36,13 +36,12 @@
* initialize a bunch of registers
*/
-void cpu_init_f (void)
+void cpu_init_f(void)
{
DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_lbc_t *memctl = &immap->im_lbc;
- //u8 val;
-
+
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
@@ -72,23 +71,21 @@ void cpu_init_f (void)
memctl->br1 = CFG_BR1_PRELIM;
#endif
- //#if !defined(CONFIG_MPC86xx)
#if defined(CFG_BR2_PRELIM) && defined(CFG_OR2_PRELIM)
memctl->or2 = CFG_OR2_PRELIM;
memctl->br2 = CFG_BR2_PRELIM;
#endif
- //#endif
-
+
#if defined(CFG_BR3_PRELIM) && defined(CFG_OR3_PRELIM)
memctl->or3 = CFG_OR3_PRELIM;
memctl->br3 = CFG_BR3_PRELIM;
#endif
-
+
#if defined(CFG_BR4_PRELIM) && defined(CFG_OR4_PRELIM)
memctl->or4 = CFG_OR4_PRELIM;
memctl->br4 = CFG_BR4_PRELIM;
#endif
-
+
#if defined(CFG_BR5_PRELIM) && defined(CFG_OR5_PRELIM)
memctl->or5 = CFG_OR5_PRELIM;
memctl->br5 = CFG_BR5_PRELIM;
@@ -123,9 +120,9 @@ void cpu_init_f (void)
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r(void)
{
- return (0);
+ return 0;
}