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authorWolfgang Denk <wd@denx.de>2010-03-30 22:22:47 +0200
committerWolfgang Denk <wd@denx.de>2010-03-30 22:22:47 +0200
commitf3dfbb681620798d212f7e4edfda6c578fe79870 (patch)
treea92f5378163f69c67f2592912eb822af0424184e /cpu/mpc86xx/cpu.c
parent7d3ef4fa20a048008b979466f1326992aadad8ce (diff)
parent9ff32d8ccf0e23b5577c25610f001af8d761b4a2 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'cpu/mpc86xx/cpu.c')
-rw-r--r--cpu/mpc86xx/cpu.c36
1 files changed, 35 insertions, 1 deletions
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index f7e012d..1887575 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2006,2009 Freescale Semiconductor, Inc.
+ * Copyright 2006,2009-2010 Freescale Semiconductor, Inc.
* Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
@@ -197,3 +197,37 @@ void mpc86xx_reginfo(void)
printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7));
}
+
+/*
+ * Set the DDR BATs to reflect the actual size of DDR.
+ *
+ * dram_size is the actual size of DDR, in bytes
+ *
+ * Note: we assume that CONFIG_MAX_MEM_MAPPED is 2G or smaller as we only
+ * are using a single BAT to cover DDR.
+ *
+ * If this is not true, (e.g. CONFIG_MAX_MEM_MAPPED is 2GB but HID0_XBSEN
+ * is not defined) then we might have a situation where U-Boot will attempt
+ * to relocated itself outside of the region mapped by DBAT0.
+ * This will cause a machine check.
+ *
+ * Currently we are limited to power of two sized DDR since we only use a
+ * single bat. If a non-power of two size is used that is less than
+ * CONFIG_MAX_MEM_MAPPED u-boot will crash.
+ *
+ */
+void setup_ddr_bat(phys_addr_t dram_size)
+{
+ unsigned long batu, bl;
+
+ bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED));
+
+ if (BATU_SIZE(bl) != dram_size) {
+ u64 sz = (u64)dram_size - BATU_SIZE(bl);
+ print_size(sz, " left unmapped\n");
+ }
+
+ batu = bl | BATU_VS | BATU_VP;
+ write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L);
+ write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L);
+}