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authorMarkus Klotzbuecher <mk@denx.de>2008-01-09 13:57:10 +0100
committerMarkus Klotzbuecher <mk@denx.de>2008-01-09 13:57:10 +0100
commit6a40ef62c4300e9f606deef0a4618cbc4b514a51 (patch)
treec01bdd0e773d092f13af05567fa92fb9072df9e0 /cpu/mpc86xx/cpu.c
parent245a362ad3c0c1b84fccc9fec7b623eb14f6e502 (diff)
parent07eb02687f008721974a2fb54cd7fdc28033ab3c (diff)
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Merge git://www.denx.de/git/u-boot
Conflicts: board/tqm5200/tqm5200.c
Diffstat (limited to 'cpu/mpc86xx/cpu.c')
-rw-r--r--cpu/mpc86xx/cpu.c19
1 files changed, 15 insertions, 4 deletions
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 9456471..11354d3 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -41,6 +41,8 @@ checkcpu(void)
uint major, minor;
uint lcrr; /* local bus clock ratio register */
uint clkdiv; /* clock divider portion of lcrr */
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
puts("Freescale PowerPC\n");
@@ -54,8 +56,14 @@ checkcpu(void)
switch (ver) {
case PVR_VER(PVR_86xx):
- puts("E600");
- break;
+ {
+ uint msscr0 = mfspr(MSSCR0);
+ printf("E600 Core %d", (msscr0 & 0x20) ? 1 : 0 );
+ if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE)
+ puts("\n Core1Translation Enabled");
+ debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr);
+ }
+ break;
default:
puts("Unknown");
break;
@@ -76,6 +84,9 @@ checkcpu(void)
puts("8641");
}
break;
+ case SVR_8610:
+ puts("8610");
+ break;
default:
puts("Unknown");
break;
@@ -120,7 +131,7 @@ checkcpu(void)
static inline void
soft_restart(unsigned long addr)
{
-#ifndef CONFIG_MPC8641HPCN
+#if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
/*
* SRR0 has system reset vector, SRR1 has default MSR value
@@ -148,7 +159,7 @@ soft_restart(unsigned long addr)
void
do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
-#ifndef CONFIG_MPC8641HPCN
+#if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
#ifdef CFG_RESET_ADDRESS
ulong addr = CFG_RESET_ADDRESS;