diff options
author | Timur Tabi <timur@freescale.com> | 2009-08-20 17:41:11 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2009-08-28 17:12:43 -0500 |
commit | 05f6f66474312ad03c39b4ca4875af46c87366bf (patch) | |
tree | ffd0d906d4bfe98327b271e0dae7c4c1dfd7bc48 /cpu/mpc85xx | |
parent | c17b79fbd0c7923948331d65cb588734a9c681ff (diff) | |
download | u-boot-imx-05f6f66474312ad03c39b4ca4875af46c87366bf.zip u-boot-imx-05f6f66474312ad03c39b4ca4875af46c87366bf.tar.gz u-boot-imx-05f6f66474312ad03c39b4ca4875af46c87366bf.tar.bz2 |
85xx: Improve MPIC initialization
The MPIC initialization code for Freescale e500 CPUs was not using I/O
accessors, and it was not issuing a read-back to the MPIC after setting
mixed mode. This may be the cause of a spurious interrupt on some systems.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r-- | cpu/mpc85xx/interrupts.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c index 4ef8395..409367d 100644 --- a/cpu/mpc85xx/interrupts.c +++ b/cpu/mpc85xx/interrupts.c @@ -31,15 +31,17 @@ #include <watchdog.h> #include <command.h> #include <asm/processor.h> +#include <asm/io.h> -int interrupt_init_cpu(unsigned long *decrementer_count) +int interrupt_init_cpu(unsigned int *decrementer_count) { - volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR); + ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC85xx_PIC_ADDR; - pic->gcr = MPC85xx_PICGCR_RST; - while (pic->gcr & MPC85xx_PICGCR_RST) + out_be32(&pic->gcr, MPC85xx_PICGCR_RST); + while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST) ; - pic->gcr = MPC85xx_PICGCR_M; + out_be32(&pic->gcr, MPC85xx_PICGCR_M); + in_be32(&pic->gcr); *decrementer_count = get_tbclk() / CONFIG_SYS_HZ; |