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author | Jon Loeliger <jdl@freescale.com> | 2008-07-10 12:05:32 -0500 |
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committer | Jon Loeliger <jdl@freescale.com> | 2008-07-10 12:05:32 -0500 |
commit | 859f24350e6e4313626f85161dd03f025a4dac59 (patch) | |
tree | a025f68619045556e662326c8e1cbc147f9b633e /cpu/mpc85xx | |
parent | 3473ab737282b08ad61841fcbb14c4d264a93a8e (diff) | |
parent | e0320b1ebec13755911a53b0af12cbf3e5e49a65 (diff) | |
download | u-boot-imx-859f24350e6e4313626f85161dd03f025a4dac59.zip u-boot-imx-859f24350e6e4313626f85161dd03f025a4dac59.tar.gz u-boot-imx-859f24350e6e4313626f85161dd03f025a4dac59.tar.bz2 |
Merge commit 'wd/master'
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r-- | cpu/mpc85xx/cpu.c | 34 | ||||
-rw-r--r-- | cpu/mpc85xx/traps.c | 8 |
2 files changed, 36 insertions, 6 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 2b7e753..0d50549 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -59,7 +59,7 @@ struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(8572, 8572_E), }; -struct cpu_type *identify_cpu(uint ver) +struct cpu_type *identify_cpu(u32 ver) { int i; for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) @@ -323,7 +323,7 @@ void upmconfig (uint upm, uint * table, uint size) /* Find the address for the dummy write transaction */ for (brp = &lbc->br0, orp = &lbc->or0, i = 0; i < 8; i++, brp += 2, orp += 2) { - + /* Look for a valid BR with selected UPM */ if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) { dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT); @@ -353,3 +353,33 @@ void upmconfig (uint upm, uint * table, uint size) } out_be32(mxmr, loopval); /* OP_NORMAL */ } + +#if defined(CONFIG_TSEC_ENET) || defined(CONFIGMPC85XX_FEC) +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +extern int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif +#if defined(CONFIG_MPC85XX_FEC) + tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME); +#else +#if defined(CONFIG_TSEC3) + tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); +#endif +#if defined(CONFIG_TSEC4) + tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); +#endif +#endif + return 0; +} +#endif diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c index fd36658..0eab694 100644 --- a/cpu/mpc85xx/traps.c +++ b/cpu/mpc85xx/traps.c @@ -216,10 +216,10 @@ MachineCheckException(struct pt_regs *regs) if (machinecheck_count > 1) { regs->nip += 4; /* skip offending instruction */ - printf("Skipping current instr, Returning to 0x%08x\n", + printf("Skipping current instr, Returning to 0x%08lx\n", regs->nip); } else { - printf("Returning back to 0x%08x\n",regs->nip); + printf("Returning back to 0x%08lx\n",regs->nip); } } @@ -302,7 +302,7 @@ ExtIntException(struct pt_regs *regs) printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx", regs->nip, regs->msr, regs->trap); vect = pic->iack0; - printf(" irq IACK0@%05x=%d\n",&pic->iack0,vect); + printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect); show_regs(regs); print_backtrace((unsigned long *)regs->gpr[1]); machinecheck_count++; @@ -310,7 +310,7 @@ ExtIntException(struct pt_regs *regs) printf("Returning back to 0x%08x\n",regs->nip); #else regs->nip += 4; /* skip offending instruction */ - printf("Skipping current instr, Returning to 0x%08x\n",regs->nip); + printf("Skipping current instr, Returning to 0x%08lx\n",regs->nip); #endif } |