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| author | James Yang <James.Yang@freescale.com> | 2008-02-08 16:46:27 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-03-26 11:43:04 -0500 |
| commit | e9ea679918fbc9a53fa2f2a904aac874ea736036 (patch) | |
| tree | ebb92fd840da9bdc9aa2fdb35dfbf454d04e9bf7 /cpu/mpc85xx | |
| parent | 591933ca6eabc440e6ed6967233aaf56fce464a3 (diff) | |
| download | u-boot-imx-e9ea679918fbc9a53fa2f2a904aac874ea736036.zip u-boot-imx-e9ea679918fbc9a53fa2f2a904aac874ea736036.tar.gz u-boot-imx-e9ea679918fbc9a53fa2f2a904aac874ea736036.tar.bz2 | |
85xx: Show DDR memory data rate in addition to the memory clock frequency.
Show the DDR memory data rate in addition to the memory clock
frequency. For DDR/DDR2 memories the memory data rate is 2x the
memory clock.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx')
| -rw-r--r-- | cpu/mpc85xx/cpu.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 4aac599..dcd8817 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -122,13 +122,16 @@ int checkcpu (void) ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; switch (ddr_ratio) { case 0x0: - printf(" DDR:%4lu MHz, ", sysinfo.freqDDRBus / 2000000); + printf(" DDR:%4lu MHz (%lu MT/s data rate), ", + sysinfo.freqDDRBus / 2000000, sysinfo.freqDDRBus / 1000000); break; case 0x7: - printf(" DDR:%4lu MHz (Synchronous), ", sysinfo.freqDDRBus / 2000000); + printf(" DDR:%4lu MHz (%lu MT/s data rate) (Synchronous), ", + sysinfo.freqDDRBus / 2000000, sysinfo.freqDDRBus / 1000000); break; default: - printf(" DDR:%4lu MHz (Asynchronous), ", sysinfo.freqDDRBus / 2000000); + printf(" DDR:%4lu MHz (%lu MT/s data rate) (Asynchronous), ", + sysinfo.freqDDRBus / 2000000, sysinfo.freqDDRBus / 1000000); break; } |