summaryrefslogtreecommitdiff
path: root/cpu/mpc85xx
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2008-04-08 10:45:50 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-04-11 17:32:51 -0500
commitf3e04bdc3f360c66801a9048956e61e41a16edba (patch)
tree43b265689bcd9451bf2d4935ed61df76660fc466 /cpu/mpc85xx
parent950a392464e616b4590bc4501be46e2d7d162dea (diff)
downloadu-boot-imx-f3e04bdc3f360c66801a9048956e61e41a16edba.zip
u-boot-imx-f3e04bdc3f360c66801a9048956e61e41a16edba.tar.gz
u-boot-imx-f3e04bdc3f360c66801a9048956e61e41a16edba.tar.bz2
85xx: Use SVR_SOC_VER instead of SVR_VER
The recent change introduced by 'Update SVR numbers to expand support' now requires that we use SVR_SOC_VER instead of SVR_VER if we want to compare against a particular processor id. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r--cpu/mpc85xx/cpu_init.c2
-rw-r--r--cpu/mpc85xx/spd_sdram.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index fce0c48..e3240b5 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -272,7 +272,7 @@ int cpu_init_r(void)
uint l2srbar;
svr = get_svr();
- ver = SVR_VER(svr);
+ ver = SVR_SOC_VER(svr);
asm("msync;isync");
cache_ctl = l2cache->l2ctl;
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index abc63c4..435458a 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -306,7 +306,7 @@ spd_sdram(void)
* Adjust DDR II IO voltage biasing.
* Only 8548 rev 1 needs the fix
*/
- if ((SVR_VER(get_svr()) == SVR_8548_E) &&
+ if ((SVR_SOC_VER(get_svr()) == SVR_8548_E) &&
(SVR_MJREV(get_svr()) == 1) &&
(spd.mem_type == SPD_MEMTYPE_DDR2)) {
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);