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authorHaiying Wang <Haiying.Wang@freescale.com>2009-01-15 11:58:35 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2009-01-23 17:03:14 -0600
commit2fc7eb0cfc608c9369001d57a0411af5e6a58f7c (patch)
tree2021c2d473dcefae9113894a8f8c3b6b1a9381f8 /cpu/mpc85xx
parentbf5b1f0c0d28ce062e1d368680632dfb099de692 (diff)
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Add secondary CPUs processor frequency for e500 core
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS, and prints each CPU's frequency separately. It also fixes up each CPU's frequency in "clock-frequency" of fdt blob. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r--cpu/mpc85xx/cpu.c7
-rw-r--r--cpu/mpc85xx/fdt.c15
-rw-r--r--cpu/mpc85xx/speed.c10
3 files changed, 24 insertions, 8 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 15ba7f1..a34e251 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -90,6 +90,7 @@ int checkcpu (void)
#else
u32 ddr_ratio = 0;
#endif
+ int i;
svr = get_svr();
ver = SVR_SOC_VER(svr);
@@ -141,8 +142,10 @@ int checkcpu (void)
get_sys_info(&sysinfo);
- puts("Clock Configuration:\n");
- printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor));
+ puts("Clock Configuration:\n ");
+ for (i = 0; i < CONFIG_NUM_CPUS; i++)
+ printf("CPU%d:%-4s MHz, ",
+ i,strmhz(buf1, sysinfo.freqProcessor[i]));
printf("CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
switch (ddr_ratio) {
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index 69fab99..1fae47c 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -213,6 +213,10 @@ void fdt_add_enet_stashing(void *fdt)
void ft_cpu_setup(void *blob, bd_t *bd)
{
+ int off;
+ int val;
+ sys_info_t sysinfo;
+
/* delete crypto node if not on an E-processor */
if (!IS_E_PROCESSOR(get_svr()))
fdt_fixup_crypto_node(blob, 0);
@@ -228,8 +232,15 @@ void ft_cpu_setup(void *blob, bd_t *bd)
"timebase-frequency", bd->bi_busfreq / 8, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
- do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
- "clock-frequency", bd->bi_intfreq, 1);
+ get_sys_info(&sysinfo);
+ off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
+ while (off != -FDT_ERR_NOTFOUND) {
+ u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
+ val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
+ fdt_setprop(blob, off, "clock-frequency", &val, 4);
+ off = fdt_node_offset_by_prop_value(blob, off, "device_type",
+ "cpu", 4);
+ }
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 0d55228..b0f47e0 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -39,17 +39,19 @@ void get_sys_info (sys_info_t * sysInfo)
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
uint plat_ratio,e500_ratio,half_freqSystemBus;
uint lcrr_div;
+ int i;
plat_ratio = (gur->porpllsr) & 0x0000003e;
plat_ratio >>= 1;
sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
- e500_ratio = (gur->porpllsr) & 0x003f0000;
- e500_ratio >>= 16;
/* Divide before multiply to avoid integer
* overflow for processor speeds above 2GHz */
half_freqSystemBus = sysInfo->freqSystemBus/2;
- sysInfo->freqProcessor = e500_ratio*half_freqSystemBus;
+ for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+ e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
+ sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
+ }
/* Note: freqDDRBus is the MCLK frequency, not the data rate. */
sysInfo->freqDDRBus = sysInfo->freqSystemBus;
@@ -105,7 +107,7 @@ int get_clocks (void)
dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
#endif
get_sys_info (&sys_info);
- gd->cpu_clk = sys_info.freqProcessor;
+ gd->cpu_clk = sys_info.freqProcessor[0];
gd->bus_clk = sys_info.freqSystemBus;
gd->mem_clk = sys_info.freqDDRBus;
gd->lbc_clk = sys_info.freqLocalBus;