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authorDave Liu <daveliu@freescale.com>2009-10-22 00:10:23 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-10-26 21:24:51 -0500
commit654ea1f3184235694306ddc5874baa27ad3018fe (patch)
tree76a5c116bcc6314f536c7ef68288d950810fe250 /cpu/mpc85xx
parent613ad28c3da4c7fc6336ef9d94993b25a5d0586e (diff)
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ppc/85xx: Make L2 support more robust
According the user manual, we need loop-check the L2 enable bit set. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r--cpu/mpc85xx/cpu_init.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 5336934..0041a60 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -360,8 +360,11 @@ int cpu_init_r(void)
/* enable the cache */
mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0);
- if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E)
+ if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
+ while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
+ ;
printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64);
+ }
#else
puts("disabled\n");
#endif