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authorEd Swarthout <Ed.Swarthout@freescale.com>2007-07-27 01:50:51 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-08-14 01:38:40 -0500
commit837f1ba05cfb248aba5ab8e1fb1bfeefa07d5962 (patch)
treeafb8a02fe74416106236caa33265e4958c453c5a /cpu/mpc85xx
parent61a21e980a7b9188424d04f1c265fdc5c21c7e85 (diff)
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8544ds PCIE support
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address. Enable LBC and ECM errors and clear error registers. Add tftpflash env var to get uboot from tftp server and flash it. Add pci/pcie convenience env vars to display register space: "run pcie3regs" to see all pcie3 ccsr registers "run pcie3cfg" to see all cfg registers Whitespace cleanup and MPC8544DS.h Enable CONFIG_INTERRUPTS. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
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