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authorwdenk <wdenk>2005-04-04 23:43:44 +0000
committerwdenk <wdenk>2005-04-04 23:43:44 +0000
commit3dd7f0f0ca1720aee5d8b1b40fd2ae093deb81a0 (patch)
tree8e1b8645e22bced846e634e4b851f2ceec855059 /cpu/mpc85xx/tsec.h
parent8aa1a2d115420b1eb126f69f3547b54d275c3228 (diff)
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* Add FEC support for TQM8540 board.
Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC * Patch by Martin Krause, 04 Apr 2005: Update default configuration for CMC_PU2 board.
Diffstat (limited to 'cpu/mpc85xx/tsec.h')
-rw-r--r--cpu/mpc85xx/tsec.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/cpu/mpc85xx/tsec.h b/cpu/mpc85xx/tsec.h
index 275bbd2..e24351a 100644
--- a/cpu/mpc85xx/tsec.h
+++ b/cpu/mpc85xx/tsec.h
@@ -142,6 +142,14 @@
#define MIIM_DM9161_10BTCSR 0x12
#define MIIM_DM9161_10BTCSR_INIT 0x7800
+/* LXT971 Status 2 registers */
+#define MIIM_LXT971_SR2 17 /* Status Register 2 */
+#define MIIM_LXT971_SR2_SPEED_MASK 0xf000
+#define MIIM_LXT971_SR2_10HDX 0x1000 /* 10 Mbit half duplex selected */
+#define MIIM_LXT971_SR2_10FDX 0x2000 /* 10 Mbit full duplex selected */
+#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
+#define MIIM_LXT971_SR2_100FDX 0x8000 /* 100 Mbit full duplex selected */
+
#define MIIM_READ_COMMAND 0x00000001
#define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN