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| author | Fredrik Arnerup <fredrik.arnerup@edgeware.tv> | 2009-06-02 16:27:10 -0500 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-06-09 22:58:18 +0200 |
| commit | 90d13b8ac3d515349626d7c8a3dc34ef38c43fa6 (patch) | |
| tree | d2610ded5f795be469922fd2916420bbd78862dc /cpu/mpc85xx/tlb.c | |
| parent | 1b5291dddf5f16c7ae10e3cb165882fa96038b26 (diff) | |
| download | u-boot-imx-90d13b8ac3d515349626d7c8a3dc34ef38c43fa6.zip u-boot-imx-90d13b8ac3d515349626d7c8a3dc34ef38c43fa6.tar.gz u-boot-imx-90d13b8ac3d515349626d7c8a3dc34ef38c43fa6.tar.bz2 | |
85xx: bugfix for reading maximum TLB size on mpc85xx
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
(256 MB)
which made u-boot hang in board_init_f() when trying to create a new stack
in RAM.
I have an mpc8540 with one 1GB dimm.
Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/tlb.c')
| -rw-r--r-- | cpu/mpc85xx/tlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index c73bf05..8304ffe 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -134,7 +134,7 @@ unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) unsigned int tlb_size; unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START; unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE; - unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff; + unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf; u64 size, memsize = (u64)memsize_in_meg << 20; size = min(memsize, CONFIG_MAX_MEM_MAPPED); |