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| author | Seunghyeon Rhee <seunghyeon@lpmtec.com> | 2009-12-03 09:41:49 +0900 |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2010-01-23 08:15:48 -0600 |
| commit | 17ef9104ae11220979e1870f22dcaf535d9baacf (patch) | |
| tree | 6de63f8b49d2cf2489b76eaa58fe255a1c8a5845 /cpu/mpc85xx/start.S | |
| parent | 57ae8a5cced612088104303777e71a3dc89c00ef (diff) | |
| download | u-boot-imx-17ef9104ae11220979e1870f22dcaf535d9baacf.zip u-boot-imx-17ef9104ae11220979e1870f22dcaf535d9baacf.tar.gz u-boot-imx-17ef9104ae11220979e1870f22dcaf535d9baacf.tar.bz2 | |
samsung: fix DMC1_MEM_CFG for s3c64xx
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'cpu/mpc85xx/start.S')
0 files changed, 0 insertions, 0 deletions