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author | Kumar Gala <galak@kernel.crashing.org> | 2007-12-07 04:59:26 -0600 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2007-12-11 22:34:20 -0600 |
commit | d435793229ce29a42797c1edc39f5b34f987f91a (patch) | |
tree | be66e43419c21c827922d620431716444e6e50e0 /cpu/mpc85xx/speed.c | |
parent | 22abb2d2eaf7b795a6923c6273ec9cb53fda9a10 (diff) | |
download | u-boot-imx-d435793229ce29a42797c1edc39f5b34f987f91a.zip u-boot-imx-d435793229ce29a42797c1edc39f5b34f987f91a.tar.gz u-boot-imx-d435793229ce29a42797c1edc39f5b34f987f91a.tar.bz2 |
Handle Asynchronous DDR clock on 85xx
The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.
Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/speed.c')
-rw-r--r-- | cpu/mpc85xx/speed.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 293269c..27de37a 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -48,6 +48,15 @@ void get_sys_info (sys_info_t * sysInfo) * overflow for processor speeds above 2GHz */ half_freqSystemBus = sysInfo->freqSystemBus/2; sysInfo->freqProcessor = e500_ratio*half_freqSystemBus; + sysInfo->freqDDRBus = sysInfo->freqSystemBus; + +#ifdef CONFIG_DDR_CLK_FREQ + { + u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; + if (ddr_ratio != 0x7) + sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ; + } +#endif } @@ -93,3 +102,19 @@ ulong get_bus_freq (ulong dummy) return val; } + +/******************************************** + * get_ddr_freq + * return ddr bus freq in Hz + *********************************************/ +ulong get_ddr_freq (ulong dummy) +{ + ulong val; + + sys_info_t sys_info; + + get_sys_info (&sys_info); + val = sys_info.freqDDRBus; + + return val; +} |