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authorTrent Piepho <tpiepho@freescale.com>2008-12-03 15:16:37 -0800
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-12-19 18:32:49 -0600
commitada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28 (patch)
treef4e5c4ef83b76a3480502b249b955a5032d6e600 /cpu/mpc85xx/speed.c
parent9863d6aca11405e1e0d8aba2045d78aeec4d4ee7 (diff)
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mpc8[56]xx: Put localbus clock in sysinfo and gd
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency and print it out, but don't save it. This changes where its calculated and stored to be more consistent with the CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock. The localbus frequency is added to sysinfo and calculated when sysinfo is set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are. get_clocks() copies the frequency into the global data, as the other frequencies are, into a new field that is only enabled for MPC85xx and MPC86xx. checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency from sysinfo, like the other frequencies, instead of calculating it on the spot. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'cpu/mpc85xx/speed.c')
-rw-r--r--cpu/mpc85xx/speed.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 1e0f483..0d55228 100644
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -28,6 +28,7 @@
#include <common.h>
#include <ppc_asm.tmpl>
#include <asm/processor.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -37,6 +38,7 @@ void get_sys_info (sys_info_t * sysInfo)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
uint plat_ratio,e500_ratio,half_freqSystemBus;
+ uint lcrr_div;
plat_ratio = (gur->porpllsr) & 0x0000003e;
plat_ratio >>= 1;
@@ -60,6 +62,30 @@ void get_sys_info (sys_info_t * sysInfo)
sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
}
#endif
+
+#if defined(CONFIG_SYS_LBC_LCRR)
+ /* We will program LCRR to this value later */
+ lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
+#else
+ {
+ volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+ lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV;
+ }
+#endif
+ if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
+#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
+ !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
+ /*
+ * Yes, the entire PQ38 family use the same
+ * bit-representation for twice the clock divider values.
+ */
+ lcrr_div *= 2;
+#endif
+ sysInfo->freqLocalBus = sysInfo->freqSystemBus / lcrr_div;
+ } else {
+ /* In case anyone cares what the unknown value is */
+ sysInfo->freqLocalBus = lcrr_div;
+ }
}
@@ -82,6 +108,7 @@ int get_clocks (void)
gd->cpu_clk = sys_info.freqProcessor;
gd->bus_clk = sys_info.freqSystemBus;
gd->mem_clk = sys_info.freqDDRBus;
+ gd->lbc_clk = sys_info.freqLocalBus;
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,