summaryrefslogtreecommitdiff
path: root/cpu/mpc85xx/spd_sdram.c
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2007-12-07 04:59:26 -0600
committerKumar Gala <galak@kernel.crashing.org>2007-12-11 22:34:20 -0600
commitd435793229ce29a42797c1edc39f5b34f987f91a (patch)
treebe66e43419c21c827922d620431716444e6e50e0 /cpu/mpc85xx/spd_sdram.c
parent22abb2d2eaf7b795a6923c6273ec9cb53fda9a10 (diff)
downloadu-boot-imx-d435793229ce29a42797c1edc39f5b34f987f91a.zip
u-boot-imx-d435793229ce29a42797c1edc39f5b34f987f91a.tar.gz
u-boot-imx-d435793229ce29a42797c1edc39f5b34f987f91a.tar.bz2
Handle Asynchronous DDR clock on 85xx
The MPC8572 introduces the concept of an asynchronous DDR clock with regards to the platform clock. Introduce get_ddr_freq() to report the DDR freq regardless of sync/async mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/spd_sdram.c')
-rw-r--r--cpu/mpc85xx/spd_sdram.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 2a4cd57..553f736 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -53,8 +53,8 @@ picos_to_clk(int picos)
{
int clks;
- clks = picos / (2000000000 / (get_bus_freq(0) / 1000));
- if (picos % (2000000000 / (get_bus_freq(0) / 1000)) != 0) {
+ clks = picos / (2000000000 / (get_ddr_freq(0) / 1000));
+ if (picos % (2000000000 / (get_ddr_freq(0) / 1000)) != 0) {
clks++;
}
@@ -421,7 +421,7 @@ spd_sdram(void)
* Adjust the CAS Latency to allow for bus speeds that
* are slower than the DDR module.
*/
- busfreq = get_bus_freq(0) / 1000000; /* MHz */
+ busfreq = get_ddr_freq(0) / 1000000; /* MHz */
effective_data_rate = max_data_rate;
if (busfreq < 90) {