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authorJon Loeliger <jdl@freescale.com>2005-08-01 13:20:47 -0500
committerJon Loeliger <jdl@freescale.com>2005-08-01 13:20:47 -0500
commitde1d0a69956a63cea6a62043ae5d5afb584efe93 (patch)
tree1914348ff43c309890deb6ecad206e37b2bc3a51 /cpu/mpc85xx/spd_sdram.c
parentb0e32949239c7870d409ca687a2dfc1261a3d838 (diff)
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Fix style issues primarily in 85xx and 83xx boards.
- C++ comments - Trailing white space - Indentation not by TAB - Excessive amount of empty lines - Trailing empty lines
Diffstat (limited to 'cpu/mpc85xx/spd_sdram.c')
-rw-r--r--cpu/mpc85xx/spd_sdram.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 049ba67..af99282 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -630,7 +630,7 @@ spd_sdram(void)
ddr->timing_cfg_2 = (0
| ((add_lat & 0x7) << 28) /* ADD_LAT */
- | ((cpo & 0x1f) << 23) /* CPO */
+ | ((cpo & 0x1f) << 23) /* CPO */
| ((wr_lat & 0x7) << 19) /* WR_LAT */
| ((trtp_clk & 0x7) << 13) /* RD_TO_PRE */
| ((wr_data_delay & 0x7) << 10) /* WR_DATA_DELAY */
@@ -822,7 +822,7 @@ spd_sdram(void)
/*
* Memory will be initialized via DMA, or not at all.
*/
- d_init = 0;
+ d_init = 0;
#endif
ddr->sdram_cfg_2 = (0